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| author | Simon Glass <sjg@chromium.org> | 2017-05-31 23:57:13 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-06-09 19:39:32 (GMT) |
| commit | 10d602ac8b6f576d545e35a951e1a714de0158a3 (patch) | |
| tree | 5109fd817bab7bcf296f3acf5f93883d090bea70 /arch/arm/lib | |
| parent | 579dfca2ef2fdff93ae78a942fef49f3d1da3f8c (diff) | |
| download | u-boot-10d602ac8b6f576d545e35a951e1a714de0158a3.tar.xz | |
arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use
instructions which are invalid on ARMv4T. This happens on Tegra since it
has an ARMv4T boot CPU. Add a check for the architecture version to allow
the code to be built. It will not actually be executed by the boot CPU,
but needs to compile.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/lib')
| -rw-r--r-- | arch/arm/lib/cache-cp15.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0f7020a..f293573 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -129,7 +129,7 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); } -#ifdef CONFIG_ARMV7_LPAE +#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4 /* Set up 4 PTE entries pointing to our 4 1GB page tables */ for (i = 0; i < 4; i++) { u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4)); |