ti816x: Rework DDR initialization sequence

The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family.  In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations.  Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient.  Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still.  As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it.  We also remove a bunch
of other untested code about changing the speed the DDR runs at.

Signed-off-by: Tom Rini <trini@konsulko.com>

1 files changed, 4 insertions, 37 deletions

diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c
index 3a110f2..68c7705 100644
--- a/arch/arm/mach-omap2/am33xx/emif4.c
+++ b/arch/arm/mach-omap2/am33xx/emif4.c
@@ -17,40 +17,9 @@
 #include <asm/io.h>
 #include <asm/emif.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
-int dram_init(void)
-{
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	sdram_init();
-#endif
-
-	/* dram_init must store complete ramsize in gd->ram_size */
-	gd->ram_size = get_ram_size(
-			(void *)CONFIG_SYS_SDRAM_BASE,
-			CONFIG_MAX_RAM_BANK_SIZE);
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = gd->ram_size;
-
-	return 0;
-}
-
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_TI81XX
-static struct dmm_lisa_map_regs *hw_lisa_map_regs =
-				(struct dmm_lisa_map_regs *)DMM_BASE;
-#endif
-#ifndef CONFIG_TI816X
 static struct vtp_reg *vtpreg[2] = {
 				(struct vtp_reg *)VTP0_CTRL_ADDR,
 				(struct vtp_reg *)VTP1_CTRL_ADDR};
-#endif
 #ifdef CONFIG_AM33XX
 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
 #endif
@@ -60,9 +29,12 @@ static struct cm_device_inst *cm_device =
 				(struct cm_device_inst *)CM_DEVICE_INST;
 #endif
 
-#ifdef CONFIG_TI81XX
+#ifdef CONFIG_TI814X
 void config_dmm(const struct dmm_lisa_map_regs *regs)
 {
+	struct dmm_lisa_map_regs *hw_lisa_map_regs =
+				(struct dmm_lisa_map_regs *)DMM_BASE;
+
 	enable_dmm_clocks();
 
 	writel(0, &hw_lisa_map_regs->dmm_lisa_map_3);
@@ -77,7 +49,6 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
 }
 #endif
 
-#ifndef CONFIG_TI816X
 static void config_vtp(int nr)
 {
 	writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE,
@@ -92,7 +63,6 @@ static void config_vtp(int nr)
 			VTP_CTRL_READY)
 		;
 }
-#endif
 
 void __weak ddr_pll_config(unsigned int ddrpll_m)
 {
@@ -103,9 +73,7 @@ void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs,
 		const struct emif_regs *regs, int nr)
 {
 	ddr_pll_config(pll);
-#ifndef CONFIG_TI816X
 	config_vtp(nr);
-#endif
 	config_cmd_ctrl(ctrl, nr);
 
 	config_ddr_data(data, nr);
@@ -139,4 +107,3 @@ void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs,
 	else
 		config_sdram(regs, nr);
 }
-#endif