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authorLey Foon Tan <ley.foon.tan@intel.com>2017-04-25 18:44:42 (GMT)
committerMarek Vasut <marex@denx.de>2017-05-18 09:33:18 (GMT)
commitcaf36e1edb983a7fa0980e0f86ebd68aa597c85f (patch)
tree043987109a44be8d02657ef303bc473066d0210c /arch/arm/mach-socfpga/include/mach/pinmux.h
parentc887d48017b0ae671344d8af3ebee48854c66b59 (diff)
downloadu-boot-caf36e1edb983a7fa0980e0f86ebd68aa597c85f.tar.xz
arm: socfpga: Add pinmux for Arria 10
Add pinmux support for Arria 10. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/pinmux.h')
-rw-r--r--arch/arm/mach-socfpga/include/mach/pinmux.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h b/arch/arm/mach-socfpga/include/mach/pinmux.h
new file mode 100644
index 0000000..563a3db
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _PINMUX_H_
+#define _PINMUX_H_
+
+#define PINMUX_UART 0xD
+
+#ifndef __ASSEMBLY__
+int config_dedicated_pins(const void *blob);
+int config_pins(const void *blob, const char *pin_grp);
+#endif
+
+#endif /* _PINMUX_H_ */