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author | Marek Vasut <marex@denx.de> | 2015-07-25 06:44:27 (GMT) |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:06 (GMT) |
commit | 93b4abd3a25ba9061f2146ebabd4aae07d74a499 (patch) | |
tree | 6260fe29cac5941315c02c992b7925b849199f78 /arch/arm/mach-socfpga/include | |
parent | 163ee7d9d2a71d0d289246c3bf50db7cc9db4a50 (diff) | |
download | u-boot-93b4abd3a25ba9061f2146ebabd4aae07d74a499.tar.xz |
arm: socfpga: clock: Clean up pll_config.h
Extract the clock configuration horribleness caused by pll_config.h in
the following manner.
First of all, introduce a few new accessors which return values of
various clocks used in clock_manager.c and use them in clock_manager.c .
These accessors replace those few macros which came from pll_config.h
originally. Also introduce an accessor which returns the struct cm_config
default configuration for the clock manager used in SPL.
The accessors are implemented in a board-specific wrap_pll_config.c
file, whose sole purpose is to include the qts-generated pll_config.h
and provide only the necessary values to the clock manager.
The purpose of this design is to limit the scope of inclusion for the
pll_config.h , which thus far was included build-wide and poluted the
namespace. With this change, the inclusion is limited to just the new
wrap_pll_config.c file, which in turn provides three simple functions
for the clock_manager.c to use.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/mach-socfpga/include')
-rw-r--r-- | arch/arm/mach-socfpga/include/mach/clock_manager.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index 8a3362f..2675951 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -15,6 +15,12 @@ unsigned int cm_get_l4_sp_clk_hz(void); unsigned int cm_get_mmc_controller_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); unsigned int cm_get_spi_controller_clk_hz(void); +const unsigned int cm_get_osc_clk_hz(const int osc); +const unsigned int cm_get_f2s_per_ref_clk_hz(void); +const unsigned int cm_get_f2s_sdr_ref_clk_hz(void); + +/* Clock configuration accessors */ +const struct cm_config * const cm_get_default_config(void); #endif struct cm_config { @@ -51,7 +57,7 @@ struct cm_config { uint32_t s2fuser2clk; }; -extern void cm_basic_init(const struct cm_config *cfg); +void cm_basic_init(const struct cm_config * const cfg); struct socfpga_clock_manager_main_pll { u32 vco; |