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authorLucas Stach <dev@lynxeye.de>2015-03-27 00:31:44 (GMT)
committerTom Warren <twarren@nvidia.com>2015-03-30 17:04:44 (GMT)
commit9b219d4dfb1f358fa0dfa03f6e529c82f9299dd2 (patch)
tree600aa0f68e92446f80cc1b16da1fd41022989fd7 /arch/arm/mach-tegra/tegra20
parente979a808612f0209ce43eddbb8bf46fe2bdf9fb8 (diff)
downloadu-boot-9b219d4dfb1f358fa0dfa03f6e529c82f9299dd2.tar.xz
tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT
Even the 8-bit case needs KBCB configured, as pin D7 is located in this pingroup. Please note that pingroup ATC seems to come out of reset with its config set to NAND so one needs to explicitly configure some other function to this group in order to avoid clashing settings which is outside the scope of this patch. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra20')
-rw-r--r--arch/arm/mach-tegra/tegra20/funcmux.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c b/arch/arm/mach-tegra/tegra20/funcmux.c
index 0df4a07..44a85c5 100644
--- a/arch/arm/mach-tegra/tegra20/funcmux.c
+++ b/arch/arm/mach-tegra/tegra20/funcmux.c
@@ -252,12 +252,14 @@ int funcmux_select(enum periph_id id, int config)
break;
case FUNCMUX_NDFLASH_KBC_8_BIT:
pinmux_set_func(PMUX_PINGRP_KBCA, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCB, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCC, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCD, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCE, PMUX_FUNC_NAND);
pinmux_set_func(PMUX_PINGRP_KBCF, PMUX_FUNC_NAND);
pinmux_tristate_disable(PMUX_PINGRP_KBCA);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCB);
pinmux_tristate_disable(PMUX_PINGRP_KBCC);
pinmux_tristate_disable(PMUX_PINGRP_KBCD);
pinmux_tristate_disable(PMUX_PINGRP_KBCE);