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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-02 12:11:29 (GMT) |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-14 07:36:13 (GMT) |
| commit | 4b50369fb53599aca34636d3a6f70117fe38bf07 (patch) | |
| tree | f67f70566a3e1902dfe6ba477032a8e4121b0497 /arch/arm/mach-uniphier/Makefile | |
| parent | 755c7d9a6179ffb15829da34cbc818d7fb4de558 (diff) | |
| download | u-boot-4b50369fb53599aca34636d3a6f70117fe38bf07.tar.xz | |
ARM: uniphier: create early page table at run-time
UniPhier SoCs are not equipped with dedicated on-chip SRAM. Instead,
locked outer cache is used as RAM area during the early boot stage
where DRAM is not ready yet. This effectively means MMU must be
always enabled while we are in SPL.
Currently, the SPL image for UniPhier SoCs contains the page table
statically defined at compile time. It has been a burden because the
16KB page table occupies a quarter memory footprint of the 64KB SPL
image.
Finally, there is no more room to implement new features in SPL.
Setting aside the NOR boot mode, this issue can be solved by creating
the page table onto RAM at run time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/Makefile')
| -rw-r--r-- | arch/arm/mach-uniphier/Makefile | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index ea3ae54..491e78e 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -5,7 +5,6 @@ ifdef CONFIG_SPL_BUILD obj-y += lowlevel_init.o -obj-y += init_page_table.o obj-y += init/ bcu/ memconf/ pll/ early-clk/ early-pinctrl/ dram/ obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ |