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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-16 18:33:04 (GMT) |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-18 14:10:44 (GMT) |
commit | 5ac9dfbe9d9a19b04ddb306e7d6833861f9b6f72 (patch) | |
tree | 4b3b0dbb2acf69140460079ff2b0c908c90d9cd2 /arch/arm/mach-uniphier/board_init.c | |
parent | 6a93478b93390a123b1d85512d66c093843e3f9b (diff) | |
download | u-boot-5ac9dfbe9d9a19b04ddb306e7d6833861f9b6f72.tar.xz |
ARM: uniphier: consolidate NAND pin-mux settings
The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers. Use them by
calling pinctrl_generic_set_state() directly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/board_init.c')
-rw-r--r-- | arch/arm/mach-uniphier/board_init.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 6bf35ee..228092c 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -47,6 +47,14 @@ static void uniphier_setup_xirq(void) writel(tmp, 0x55000090); } +static void uniphier_nand_pin_init(bool cs2) +{ +#ifdef CONFIG_NAND_DENALI + if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp")) + pr_err("failed to init NAND pins\n"); +#endif +} + int board_init(void) { led_puts("U0"); @@ -54,55 +62,56 @@ int board_init(void) switch (uniphier_get_soc_type()) { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) case SOC_UNIPHIER_SLD3: - uniphier_sld3_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_ld4_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) case SOC_UNIPHIER_LD4: - uniphier_ld4_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_ld4_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) case SOC_UNIPHIER_PRO4: - uniphier_pro4_pin_init(); + uniphier_nand_pin_init(false); led_puts("U1"); uniphier_pro4_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) case SOC_UNIPHIER_SLD8: - uniphier_sld8_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_ld4_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) case SOC_UNIPHIER_PRO5: - uniphier_pro5_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_pro5_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) case SOC_UNIPHIER_PXS2: - uniphier_pxs2_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_pxs2_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) case SOC_UNIPHIER_LD6B: - uniphier_ld6b_pin_init(); + uniphier_nand_pin_init(true); led_puts("U1"); uniphier_pxs2_clk_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) case SOC_UNIPHIER_LD11: + uniphier_nand_pin_init(false); uniphier_ld20_pin_init(); led_puts("U1"); uniphier_ld11_clk_init(); @@ -110,6 +119,7 @@ int board_init(void) #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) case SOC_UNIPHIER_LD20: + uniphier_nand_pin_init(false); uniphier_ld20_pin_init(); led_puts("U1"); uniphier_ld20_clk_init(); |