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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-03-18 07:41:52 (GMT) |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-03-23 16:45:41 (GMT) |
commit | d5cf32977f0068c046687e3ff944c5e637b4bfa0 (patch) | |
tree | 8eaba9e42364abc83cfbbc3ffeed891a4efa0c69 /arch/arm/mach-uniphier/debug-uart/debug-uart.c | |
parent | 650aedbfc03e2f594ca0a8000b357dc6412710aa (diff) | |
download | u-boot-d5cf32977f0068c046687e3ff944c5e637b4bfa0.tar.xz |
ARM: uniphier: support Debug UART
For ARM32 architecture, CONFIG_DEBUG_LL is available for early
low-level debugging (and actually UniPhier 32bit SoCs use it), but
ARM64 architecture does not support it. Instead, CONFIG_DEBUG_UART
is available as an architecture-independent debug facility.
This commit supports it on all the UniPhier SoCs (including the new
ARMv8 SoCs), which is very useful for new SoC bringups.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/debug-uart/debug-uart.c')
-rw-r--r-- | arch/arm/mach-uniphier/debug-uart/debug-uart.c | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c new file mode 100644 index 0000000..d884785 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <linux/io.h> +#include <linux/serial_reg.h> + +#include "../soc-info.h" +#include "debug-uart.h" + +#define UNIPHIER_UART_TX 0x00 +#define UNIPHIER_UART_LCR_MCR 0x10 +#define UNIPHIER_UART_LSR 0x14 +#define UNIPHIER_UART_LDR 0x24 + +static void _debug_uart_putc(int c) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + + while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE)) + ; + + writel(c, base + UNIPHIER_UART_TX); +} + +void _debug_uart_init(void) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + unsigned int divisor; + + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: + divisor = uniphier_sld3_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: + divisor = uniphier_ld4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: + divisor = uniphier_pro4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: + divisor = uniphier_sld8_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: + divisor = uniphier_pro5_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + case SOC_UNIPHIER_PXS2: + divisor = uniphier_pxs2_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_LD6B: + divisor = uniphier_ld6b_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: + case SOC_UNIPHIER_LD20: + divisor = uniphier_ld20_debug_uart_init(); + break; +#endif + default: + return; + } + + writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR); + + writel(divisor, base + UNIPHIER_UART_LDR); +} +DEBUG_UART_FUNCS |