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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
| commit | 13a3972585af60ec367d209cedbd3601e0c77467 (patch) | |
| tree | 4b3312669b3e501f6bc10b39d8c7bbf516f07aac /arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | |
| parent | 208bd51396fb606dbdcf45b064e6b372d7dd3e81 (diff) | |
| parent | 297faccca2235e359012118495b9b73451d54bb9 (diff) | |
| download | u-boot-13a3972585af60ec367d209cedbd3601e0c77467.tar.xz | |
Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c')
| -rw-r--r-- | arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c deleted file mode 100644 index 5b5958b..0000000 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <linux/io.h> -#include <mach/sbc-regs.h> -#include <mach/sg-regs.h> - -void sbc_init(void) -{ - u32 tmp; - - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); - - /* XECS1: sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - - /* XECS0: boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); - - /* XECS3: peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); - writel(0x0400bc01, SBBASE1); - writel(0x0800bf01, SBBASE3); - - /* enable access to sub memory when boot swap is on */ - if (boot_is_swapped()) - sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ - - sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ -} |