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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
commit | 13a3972585af60ec367d209cedbd3601e0c77467 (patch) | |
tree | 4b3312669b3e501f6bc10b39d8c7bbf516f07aac /arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c | |
parent | 208bd51396fb606dbdcf45b064e6b372d7dd3e81 (diff) | |
parent | 297faccca2235e359012118495b9b73451d54bb9 (diff) | |
download | u-boot-13a3972585af60ec367d209cedbd3601e0c77467.tar.xz |
Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c')
-rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c new file mode 100644 index 0000000..f936a53 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_sld8_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(15, 0, 8, 4); /* XNFRE_GB -> XNFRE_GB */ + sg_set_pinsel(16, 0, 8, 4); /* XNFWE_GB -> XNFWE_GB */ + sg_set_pinsel(17, 0, 8, 4); /* XFALE_GB -> NFALE_GB */ + sg_set_pinsel(18, 0, 8, 4); /* XFCLE_GB -> NFCLE_GB */ + sg_set_pinsel(19, 0, 8, 4); /* XNFWP_GB -> XFNWP_GB */ + sg_set_pinsel(20, 0, 8, 4); /* XNFCE0_GB -> XNFCE0_GB */ + sg_set_pinsel(21, 0, 8, 4); /* NANDRYBY0_GB -> NANDRYBY0_GB */ + sg_set_pinsel(22, 0, 8, 4); /* XFNCE1_GB -> XFNCE1_GB */ + sg_set_pinsel(23, 0, 8, 4); /* NANDRYBY1_GB -> NANDRYBY1_GB */ + sg_set_pinsel(24, 0, 8, 4); /* NFD0_GB -> NFD0_GB */ + sg_set_pinsel(25, 0, 8, 4); /* NFD1_GB -> NFD1_GB */ + sg_set_pinsel(26, 0, 8, 4); /* NFD2_GB -> NFD2_GB */ + sg_set_pinsel(27, 0, 8, 4); /* NFD3_GB -> NFD3_GB */ + sg_set_pinsel(28, 0, 8, 4); /* NFD4_GB -> NFD4_GB */ + sg_set_pinsel(29, 0, 8, 4); /* NFD5_GB -> NFD5_GB */ + sg_set_pinsel(30, 0, 8, 4); /* NFD6_GB -> NFD6_GB */ + sg_set_pinsel(31, 0, 8, 4); /* NFD7_GB -> NFD7_GB */ +#endif + +#ifdef CONFIG_USB_EHCI_UNIPHIER + sg_set_pinsel(41, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(42, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(43, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(44, 0, 8, 4); /* USB1OD -> USB1OD */ + /* sg_set_pinsel(114, 1, 8, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */ + /* sg_set_pinsel(115, 1, 8, 4); */ /* RXD1 -> USB2OD */ +#endif +} |