diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-07-22 11:20:11 (GMT) |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-07-23 15:44:55 (GMT) |
| commit | 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8 (patch) | |
| tree | 33a6175548430ad8e3b75838d131c58867a24fbe /arch/arm/mach-uniphier/sc-regs.h | |
| parent | be44a4679feed5a416cdce9b06514473ff82ce95 (diff) | |
| download | u-boot-29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8.tar.xz | |
ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
Deassert resets and enable clock signals of xHCI blocks if the
corresponding CONFIG is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/sc-regs.h')
| -rw-r--r-- | arch/arm/mach-uniphier/sc-regs.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index a095589..ad58e10 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -1,7 +1,9 @@ /* * UniPhier SC (System Control) block registers * - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -68,6 +70,10 @@ #define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */ #define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */ +#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) + +#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) + #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ |