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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-24 12:14:00 (GMT) |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-25 15:36:58 (GMT) |
commit | 7381db86a90bb36d6e615da835ae6964af68f260 (patch) | |
tree | 3899e13c384b92e5dcf00a910654bc8911e0bfb6 /arch/arm | |
parent | 0586e22783ca3d575ad86b1a0656875ee071489a (diff) | |
download | u-boot-7381db86a90bb36d6e615da835ae6964af68f260.tar.xz |
ARM: uniphier: rename UMC register macros of PH1-LD20
Correct some register names.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-uniphier/dram/umc-ld20.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/dram/umc64-regs.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c index 33cd487..186a398 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20.c +++ b/arch/arm/mach-uniphier/dram/umc-ld20.c @@ -200,9 +200,9 @@ static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq, writel(umc_dataset[freq], dc_base + UMC_DATASET); writel(0x00400020, dc_base + UMC_DCCGCTL); - writel(0x00000003, dc_base + UMC_ACSCTLA); + writel(0x00000003, dc_base + UMC_ACSSETA); writel(0x00000103, dc_base + UMC_FLOWCTLG); - writel(0x00010200, dc_base + UMC_ACSSETA); + writel(0x00010200, dc_base + UMC_ACSSETB); writel(umc_flowctla[freq], dc_base + UMC_FLOWCTLA); writel(0x00004444, dc_base + UMC_FLOWCTLC); diff --git a/arch/arm/mach-uniphier/dram/umc64-regs.h b/arch/arm/mach-uniphier/dram/umc64-regs.h index 46e513c..1b6a838 100644 --- a/arch/arm/mach-uniphier/dram/umc64-regs.h +++ b/arch/arm/mach-uniphier/dram/umc64-regs.h @@ -23,8 +23,8 @@ #define UMC_SPCSETB_AREFMD_ARB (0x0) /* control by arbitor */ #define UMC_SPCSETB_AREFMD_CONT (0x1) /* control by DRAMCONT */ #define UMC_SPCSETB_AREFMD_REG (0x2) /* control by register */ -#define UMC_ACSCTLA 0x000000C0 -#define UMC_ACSSETA 0x000000C4 +#define UMC_ACSSETA 0x000000C0 +#define UMC_ACSSETB 0x000000C4 #define UMC_MEMCONF0A 0x00000200 #define UMC_MEMCONF0B 0x00000204 #define UMC_MEMCONFCH 0x00000240 |