diff options
author | Tom Rini <trini@konsulko.com> | 2016-12-12 12:19:28 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-12-12 12:19:28 (GMT) |
commit | b591730c357fd9347c4134ac2883ae039b79915c (patch) | |
tree | f83d35d58b178dea34fed7dd71352e1aaa4eefb9 /arch/arm | |
parent | fe9822556e051e6c24a3832532166ade00a81a8c (diff) | |
parent | a20b7a2a53d3ac668d1ed25b06cd6d15ca41f2a9 (diff) | |
download | u-boot-b591730c357fd9347c4134ac2883ae039b79915c.tar.xz |
Merge git://www.denx.de/git/u-boot-marvell
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/armada-7040-db.dts | 64 | ||||
-rw-r--r-- | arch/arm/dts/armada-8040-db.dts | 114 | ||||
-rw-r--r-- | arch/arm/dts/armada-ap806.dtsi | 18 | ||||
-rw-r--r-- | arch/arm/dts/armada-cp110-master.dtsi | 32 | ||||
-rw-r--r-- | arch/arm/dts/armada-cp110-slave.dtsi | 19 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-armada8k/cache_llc.h | 21 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-armada8k/soc-info.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/armada8k/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/armada8k/cache_llc.S | 39 |
9 files changed, 261 insertions, 64 deletions
diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts index b8fe5a9..466c6dc 100644 --- a/arch/arm/dts/armada-7040-db.dts +++ b/arch/arm/dts/armada-7040-db.dts @@ -66,36 +66,14 @@ }; }; -&i2c0 { - status = "okay"; - clock-frequency = <100000>; -}; - -&spi0 { - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "U-Boot"; - reg = <0 0x200000>; - }; - partition@400000 { - label = "Filesystem"; - reg = <0x200000 0xce0000>; - }; - }; - }; +&ap_pinctl { + /* MPP Bus: + * SDIO [0-5] + * UART0 [11,19] + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 1 1 1 1 1 1 0 0 0 0 + 0 3 0 0 0 0 0 0 0 3 >; }; &uart0 { @@ -108,11 +86,37 @@ }; &cpm_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c0_pins>; status = "okay"; clock-frequency = <100000>; }; +&cpm_pinctl { + /* MPP Bus: + * TDM [0-11] + * SPI [13-16] + * SATA1 [28] + * UART0 [29-30] + * SMI [32,34] + * XSMI [35-36] + * I2C [37-38] + * RGMII1[44-55] + * SD [56-62] + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 4 4 4 4 4 4 4 4 4 4 + 4 4 0 3 3 3 3 0 0 0 + 0 0 0 0 0 0 0 0 9 0xA + 0xA 0 7 0 7 7 7 2 2 0 + 0 0 0 0 1 1 1 1 1 1 + 1 1 1 1 1 1 0xE 0xE 0xE 0xE + 0xE 0xE 0xE >; +}; + &cpm_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_spi0_pins>; status = "okay"; spi-flash@0 { diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts index 7fb674b..40def9d 100644 --- a/arch/arm/dts/armada-8040-db.dts +++ b/arch/arm/dts/armada-8040-db.dts @@ -57,7 +57,7 @@ aliases { i2c0 = &cpm_i2c0; - spi0 = &spi0; + spi0 = &cps_spi1; }; memory@00000000 { @@ -66,50 +66,55 @@ }; }; -&i2c0 { +/* Accessible over the mini-USB CON9 connector on the main board */ +&uart0 { status = "okay"; - clock-frequency = <100000>; }; -&spi0 { - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "U-Boot"; - reg = <0 0x200000>; - }; - partition@400000 { - label = "Filesystem"; - reg = <0x200000 0xce0000>; - }; - }; - }; +&ap_pinctl { + /* MPP Bus: + * SDIO [0-10] + * UART0 [11,19] + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 1 1 1 1 1 1 1 1 1 1 + 1 3 0 0 0 0 0 0 0 3 >; }; -/* Accessible over the mini-USB CON9 connector on the main board */ -&uart0 { - status = "okay"; +&cpm_pinctl { + /* MPP Bus: + * [0-31] = 0xff: Keep default CP0_shared_pins: + * [11] CLKOUT_MPP_11 (out) + * [23] LINK_RD_IN_CP2CP (in) + * [25] CLKOUT_MPP_25 (out) + * [29] AVS_FB_IN_CP2CP (in) + * [32,34] SMI + * [31] GPIO: push button/Wake + * [35-36] GPIO + * [37-38] I2C + * [40-41] SATA[0/1]_PRESENT_ACTIVEn + * [42-43] XSMI + * [44-55] RGMII1 + * [56-62] SD + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0 7 0 7 0 0 2 2 0 + 0 0 8 8 1 1 1 1 1 1 + 1 1 1 1 1 1 0xe 0xe 0xe 0xe + 0xe 0xe 0xe >; }; - /* CON5 on CP0 expansion */ &cpm_pcie2 { status = "okay"; }; &cpm_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c0_pins>; status = "okay"; clock-frequency = <100000>; }; @@ -129,14 +134,55 @@ status = "okay"; }; +&cps_pinctl { + /* MPP Bus: + * [0-11] RGMII0 + * [13-16] SPI1 + * [27,31] GE_MDIO/MDC + * [32-62] = 0xff: Keep default CP1_shared_pins: + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 + 0x3 0x3 0xff 0x3 0x3 0x3 0x3 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x8 0xff 0xff + 0xff 0x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff >; +}; + /* CON5 on CP1 expansion */ &cps_pcie2 { status = "okay"; }; -&cps_i2c0 { +&cps_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cps_spi1_pins>; status = "okay"; - clock-frequency = <100000>; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0 0x200000>; + }; + partition@400000 { + label = "Filesystem"; + reg = <0x200000 0xce0000>; + }; + }; + }; }; /* CON4 on CP1 expansion */ diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index d315b29..efb383b 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -140,6 +140,24 @@ marvell,spi-base = <128>, <136>, <144>, <152>; }; + ap_pinctl: ap-pinctl@6F4000 { + compatible = "marvell,armada-ap806-pinctrl"; + bank-name ="apn-806"; + reg = <0x6F4000 0x10>; + pin-count = <20>; + max-func = <3>; + + ap_i2c0_pins: i2c-pins-0 { + marvell,pins = < 4 5 >; + marvell,function = <3>; + }; + ap_emmc_pins: emmc-pins-0 { + marvell,pins = < 0 1 2 3 4 5 6 7 + 8 9 10 >; + marvell,function = <1>; + }; + }; + xor@400000 { compatible = "marvell,mv-xor-v2"; reg = <0x400000 0x1000>, diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index 422d754..d637867 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -81,6 +81,38 @@ "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; }; + cpm_pinctl: cpm-pinctl@440000 { + compatible = "marvell,mvebu-pinctrl", + "marvell,a70x0-pinctrl", + "marvell,a80x0-cp0-pinctrl"; + bank-name ="cp0-110"; + reg = <0x440000 0x20>; + pin-count = <63>; + max-func = <0xf>; + + cpm_i2c0_pins: cpm-i2c-pins-0 { + marvell,pins = < 37 38 >; + marvell,function = <2>; + }; + cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 { + marvell,pins = < 44 45 46 47 48 49 50 51 + 52 53 54 55 >; + marvell,function = <1>; + }; + pca0_pins: cpm-pca0_pins { + marvell,pins = <62>; + marvell,function = <0>; + }; + cpm_sdhci_pins: cpm-sdhi-pins-0 { + marvell,pins = < 56 57 58 59 60 61 >; + marvell,function = <14>; + }; + cpm_spi0_pins: cpm-spi-pins-0 { + marvell,pins = < 13 14 15 16 >; + marvell,function = <3>; + }; + }; + cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci"; reg = <0x540000 0x30000>; diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index a7f77b9..92ef55c 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -81,6 +81,25 @@ "cps-usb3dev", "cps-eip150", "cps-eip197"; }; + cps_pinctl: cps-pinctl@440000 { + compatible = "marvell,mvebu-pinctrl", + "marvell,a80x0-cp1-pinctrl"; + bank-name ="cp1-110"; + reg = <0x440000 0x20>; + pin-count = <63>; + max-func = <0xf>; + + cps_ge1_rgmii_pins: cps-ge-rgmii-pins-0 { + marvell,pins = < 0 1 2 3 4 5 6 7 + 8 9 10 11 >; + marvell,function = <3>; + }; + cps_spi1_pins: cps-spi-pins-1 { + marvell,pins = < 13 14 15 16 >; + marvell,function = <3>; + }; + }; + cps_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci"; reg = <0x540000 0x30000>; diff --git a/arch/arm/include/asm/arch-armada8k/cache_llc.h b/arch/arm/include/asm/arch-armada8k/cache_llc.h new file mode 100644 index 0000000..8f97e6d --- /dev/null +++ b/arch/arm/include/asm/arch-armada8k/cache_llc.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Marvell International Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + * https://spdx.org/licenses + */ + +#ifndef _CACHE_LLC_H_ +#define _CACHE_LLC_H_ + +/* Armada-7K/8K last level cache */ + +#define MVEBU_A8K_REGS_BASE_MSB 0xf000 +#define LLC_BASE_ADDR 0x8000 +#define LLC_CACHE_SYNC 0x700 +#define LLC_CACHE_SYNC_COMPLETE 0x730 +#define LLC_FLUSH_BY_WAY 0x7fc +#define LLC_WAY_MASK 0xffffffff +#define LLC_CACHE_SYNC_MASK 0x1 + +#endif /* _CACHE_LLC_H_ */ diff --git a/arch/arm/include/asm/arch-armada8k/soc-info.h b/arch/arm/include/asm/arch-armada8k/soc-info.h new file mode 100644 index 0000000..bae3995 --- /dev/null +++ b/arch/arm/include/asm/arch-armada8k/soc-info.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2016 Marvell International Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + * https://spdx.org/licenses + */ + +#ifndef _SOC_INFO_H_ +#define _SOC_INFO_H_ + +/* Pin Ctrl driver definitions */ +#define BITS_PER_PIN 4 +#define PIN_FUNC_MASK ((1 << BITS_PER_PIN) - 1) +#define PIN_REG_SHIFT 3 +#define PIN_FIELD_MASK ((1 << PIN_REG_SHIFT) - 1) + +#endif /* _SOC_INFO_H_ */ diff --git a/arch/arm/mach-mvebu/armada8k/Makefile b/arch/arm/mach-mvebu/armada8k/Makefile index 84c69d9..0facf14 100644 --- a/arch/arm/mach-mvebu/armada8k/Makefile +++ b/arch/arm/mach-mvebu/armada8k/Makefile @@ -5,3 +5,4 @@ # obj-y = cpu.o +obj-y += cache_llc.o diff --git a/arch/arm/mach-mvebu/armada8k/cache_llc.S b/arch/arm/mach-mvebu/armada8k/cache_llc.S new file mode 100644 index 0000000..71aecb2 --- /dev/null +++ b/arch/arm/mach-mvebu/armada8k/cache_llc.S @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2016 Marvell International Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + * https://spdx.org/licenses + */ + +#include <asm/arch-armada8k/cache_llc.h> +#include <linux/linkage.h> + +/* + * int __asm_flush_l3_dcache + * + * flush Armada-8K last level cache. + * + */ +ENTRY(__asm_flush_l3_dcache) + /* flush cache */ + mov x0, #LLC_BASE_ADDR + add x0, x0, #LLC_FLUSH_BY_WAY + movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 + mov w1, #LLC_WAY_MASK + str w1, [x0] + /* sync cache */ + mov x0, #LLC_BASE_ADDR + add x0, x0, #LLC_CACHE_SYNC + movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 + str wzr, [x0] + /* check that cache sync completed */ + mov x0, #LLC_BASE_ADDR + add x0, x0, #LLC_CACHE_SYNC_COMPLETE + movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 +1: ldr w1, [x0] + and w1, w1, #LLC_CACHE_SYNC_MASK + cbnz w1, 1b + /* return success */ + mov x0, #0 + ret +ENDPROC(__asm_flush_l3_dcache) |