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author | Jagan Teki <jteki@openedev.com> | 2015-08-15 17:45:21 (GMT) |
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committer | Jagan Teki <jteki@openedev.com> | 2015-10-25 14:47:01 (GMT) |
commit | e9cf6ec5160d457af1423ffe9ce254754b4cdde5 (patch) | |
tree | 5d84d35892b4cc539d4ab0cdc298d2c441f9d9a4 /arch/arm | |
parent | 659cc156306561a6115d583e82b49e42ce3af9b2 (diff) | |
download | u-boot-e9cf6ec5160d457af1423ffe9ce254754b4cdde5.tar.xz |
dts: zc702: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc702 board.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/zynq-zc702.dts | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 6691a8d..4d86960 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -17,6 +17,7 @@ ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; + spi0 = &qspi; }; memory { @@ -380,6 +381,10 @@ pinctrl-0 = <&pinctrl_uart1_default>; }; +&qspi { + status = "okay"; +}; + &usb0 { status = "okay"; dr_mode = "host"; |