armv8: Correct errata related patch defect.

Let patch code apply correct SoC.
1.A009007
2.A008997
3.A009798
4.A009008

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>

1 files changed, 33 insertions, 10 deletions

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d66ee1a..0a5c6b9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -29,18 +29,24 @@ DECLARE_GLOBAL_DATA_PTR;
 static void erratum_a009008(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009008
-#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \
+	defined(CONFIG_ARCH_LS1012A)
 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB1 / 4);
 val &= ~(0xF << 6);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB1 / 4, val|(USB_TXVREFTUNE << 6));
+#endif
+
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB2 / 4);
 val &= ~(0xF << 6);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB2 / 4, val|(USB_TXVREFTUNE << 6));
 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB3 / 4);
 val &= ~(0xF << 6);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB3 / 4, val|(USB_TXVREFTUNE << 6));
-#elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
+#endif
+
+#if defined(CONFIG_ARCH_LS2080A)
 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR / 4);
 val &= ~(0xF << 6);
@@ -53,15 +59,21 @@ scfg_out32(scfg + SCFG_USB3PRM1CR / 4, val|(USB_TXVREFTUNE << 6));
 static void erratum_a009798(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009798
-#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \
+	defined(CONFIG_ARCH_LS1012A)
 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB1 / 4);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB1 / 4 , val & USB_SQRXTUNE);
+#endif
+
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
 val = gur_in32(scfg + SCFG_USB3PRM1CR_USB2 / 4);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB2 / 4 , val & USB_SQRXTUNE);
 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB3 / 4);
 scfg_out32(scfg + SCFG_USB3PRM1CR_USB3 / 4 , val & USB_SQRXTUNE);
-#elif defined(CONFIG_ARCH_LS2080A)
+#endif
+
+#if defined(CONFIG_ARCH_LS2080A)
 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR / 4);
 scfg_out32(scfg + SCFG_USB3PRM1CR / 4, val & USB_SQRXTUNE);
@@ -72,12 +84,16 @@ scfg_out32(scfg + SCFG_USB3PRM1CR / 4, val & USB_SQRXTUNE);
 static void erratum_a008997(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008997
-#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \
+	defined(CONFIG_ARCH_LS1012A)
 	u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 	u32 val = scfg_in32(scfg + SCFG_USB3PRM2CR_USB1 / 4);
 	val &= ~(0x7F << 9);
 	scfg_out32(scfg + SCFG_USB3PRM2CR_USB1 / 4,
 		   val | (USB_PCSTXSWINGFULL << 9));
+#endif
+
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
 	val = scfg_in32(scfg + SCFG_USB3PRM2CR_USB2 / 4);
 	val &= ~(0x7F << 9);
 	scfg_out32(scfg + SCFG_USB3PRM2CR_USB2 / 4,
@@ -86,7 +102,9 @@ static void erratum_a008997(void)
 	val &= ~(0x7F << 9);
 	scfg_out32(scfg + SCFG_USB3PRM2CR_USB3 / 4,
 		   val | (USB_PCSTXSWINGFULL << 9));
-#elif defined(CONFIG_ARCH_LS2080A)
+#endif
+
+#if defined(CONFIG_ARCH_LS2080A)
 	u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
 	u32 val = scfg_in32(scfg + SCFG_USB3PRM2CR / 4);
 	val &= ~(0x7F << 9);
@@ -100,12 +118,16 @@ static void erratum_a009007(void)
 {
 /* TODO:implement the out_be16 instead of writew which is taking
 little endian style */
-#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \
+	defined(CONFIG_ARCH_LS1012A)
 	u32 __iomem *usb_phy = (u32 __iomem *)USB_PHY1;
 	writew(USB_PHY_RX_EQ_VAL_1, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_2, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_3, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_4, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
+#endif
+
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
 	usb_phy = (u32 __iomem *)USB_PHY2;
 	writew(USB_PHY_RX_EQ_VAL_1, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_2, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
@@ -116,7 +138,9 @@ little endian style */
 	writew(USB_PHY_RX_EQ_VAL_2, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_3, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_4, (u8 *)(usb_phy) + USB_PHY_RX_OVRD_IN_HI);
-#elif defined(CONFIG_ARCH_LS2080A)
+#endif
+
+#if defined(CONFIG_ARCH_LS2080A)
 	u32 __iomem *dcsr = (u32 __iomem *)DCSR_BASE;
 	writew(USB_PHY_RX_EQ_VAL_1,
 	       (u8 *)(dcsr) + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI);
@@ -134,7 +158,7 @@ little endian style */
 	       (u8 *)(dcsr) + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
 	writew(USB_PHY_RX_EQ_VAL_4,
 	       (u8 *)(dcsr) + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
-#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
+#endif
 }
 
 bool soc_has_dp_ddr(void)
@@ -310,7 +334,6 @@ void fsl_lsch3_early_init_f(void)
 	erratum_a008514();
 	erratum_a008336();
 	erratum_a009008();
-	erratum_a009008();
 	erratum_a009798();
 	erratum_a008997();
 	erratum_a009007();