diff options
| author | Graeme Russ <graeme.russ@gmail.com> | 2011-02-12 04:11:35 (GMT) |
|---|---|---|
| committer | Graeme Russ <graeme.russ@gmail.com> | 2011-02-12 04:11:35 (GMT) |
| commit | 0ea76e92e989ce292f1eeadc0754b3ab9a50df16 (patch) | |
| tree | 58a5d6f50479fe10dea06112462fb9ec97bce9f2 /arch/i386/cpu/cpu.c | |
| parent | 4e33467d44620edf224aad03c2c7396fb4918696 (diff) | |
| download | u-boot-0ea76e92e989ce292f1eeadc0754b3ab9a50df16.tar.xz | |
x86: Make cpu init functions weak
Diffstat (limited to 'arch/i386/cpu/cpu.c')
| -rw-r--r-- | arch/i386/cpu/cpu.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/i386/cpu/cpu.c b/arch/i386/cpu/cpu.c index e96380a..2339cd4 100644 --- a/arch/i386/cpu/cpu.c +++ b/arch/i386/cpu/cpu.c @@ -87,7 +87,7 @@ static void reload_gdt(void) } -int cpu_init_f(void) +int x86_cpu_init_f(void) { const u32 em_rst = ~X86_CR0_EM; const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE; @@ -102,15 +102,25 @@ int cpu_init_f(void) return 0; } +int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f"))); -int cpu_init_r(void) +int x86_cpu_init_r(void) { + const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD); + + /* turn on the cache and disable write through */ + asm("movl %%cr0, %%eax\n" + "andl %0, %%eax\n" + "movl %%eax, %%cr0\n" + "wbinvd\n" : : "i" (nw_cd_rst) : "eax"); + reload_gdt(); /* Initialize core interrupt and exception functionality of CPU */ cpu_init_interrupts (); return 0; } +int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { |