diff options
author | Marek Vasut <marex@denx.de> | 2012-09-12 23:16:50 (GMT) |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2012-10-15 18:53:51 (GMT) |
commit | 7b953c51654912b94a71854b9d2e6b48ee3b7908 (patch) | |
tree | 742c4456a1977ccdd5b4a0e28fdba83467bd47f3 /arch/mips/cpu/mips32/au1x00 | |
parent | 41651cab97143e3385057279a2633e2812f328ba (diff) | |
download | u-boot-7b953c51654912b94a71854b9d2e6b48ee3b7908.tar.xz |
serial: mips: Implement CONFIG_SERIAL_MULTI into au1x00 serial driver
Implement support for CONFIG_SERIAL_MULTI into au1x00 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the au1x00 driver. Also, add a weak implementation
of default_serial_console() returning this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Diffstat (limited to 'arch/mips/cpu/mips32/au1x00')
-rw-r--r-- | arch/mips/cpu/mips32/au1x00/au1x00_serial.c | 74 |
1 files changed, 64 insertions, 10 deletions
diff --git a/arch/mips/cpu/mips32/au1x00/au1x00_serial.c b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c index c25ba5a..9682775 100644 --- a/arch/mips/cpu/mips32/au1x00/au1x00_serial.c +++ b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c @@ -28,6 +28,8 @@ #include <config.h> #include <common.h> #include <asm/au1x00.h> +#include <serial.h> +#include <linux/compiler.h> /****************************************************************************** * @@ -40,7 +42,7 @@ * RETURNS: N/A */ -int serial_init (void) +static int au1x00_serial_init(void) { volatile u32 *uart_fifoctl = (volatile u32*)(UART0_ADDR+UART_FCR); volatile u32 *uart_enable = (volatile u32*)(UART0_ADDR+UART_ENABLE); @@ -63,7 +65,7 @@ int serial_init (void) } -void serial_setbrg (void) +static void au1x00_serial_setbrg(void) { volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK); volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR); @@ -87,12 +89,13 @@ void serial_setbrg (void) *uart_lcr = UART_LCR_WLEN8; } -void serial_putc (const char c) +static void au1x00_serial_putc(const char c) { volatile u32 *uart_lsr = (volatile u32*)(UART0_ADDR+UART_LSR); volatile u32 *uart_tx = (volatile u32*)(UART0_ADDR+UART_TX); - if (c == '\n') serial_putc ('\r'); + if (c == '\n') + au1x00_serial_putc('\r'); /* Wait for fifo to shift out some bytes */ while((*uart_lsr&UART_LSR_THRE)==0); @@ -100,15 +103,13 @@ void serial_putc (const char c) *uart_tx = (u32)c; } -void serial_puts (const char *s) +static void au1x00_serial_puts(const char *s) { while (*s) - { - serial_putc (*s++); - } + serial_putc(*s++); } -int serial_getc (void) +static int au1x00_serial_getc(void) { volatile u32 *uart_rx = (volatile u32*)(UART0_ADDR+UART_RX); char c; @@ -119,7 +120,7 @@ int serial_getc (void) return c; } -int serial_tstc (void) +static int au1x00_serial_tstc(void) { volatile u32 *uart_lsr = (volatile u32*)(UART0_ADDR+UART_LSR); @@ -129,3 +130,56 @@ int serial_tstc (void) } return 0; } + +#ifdef CONFIG_SERIAL_MULTI +static struct serial_device au1x00_serial_drv = { + .name = "au1x00_serial", + .start = au1x00_serial_init, + .stop = NULL, + .setbrg = au1x00_serial_setbrg, + .putc = au1x00_serial_putc, + .puts = au1x00_serial_puts, + .getc = au1x00_serial_getc, + .tstc = au1x00_serial_tstc, +}; + +void au1x00_serial_initialize(void) +{ + serial_register(&au1x00_serial_drv); +} + +__weak struct serial_device *default_serial_console(void) +{ + return &au1x00_serial_drv; +} +#else +int serial_init(void) +{ + return au1x00_serial_init(); +} + +void serial_setbrg(void) +{ + au1x00_serial_setbrg(); +} + +void serial_putc(const char c) +{ + au1x00_serial_putc(c); +} + +void serial_puts(const char *s) +{ + au1x00_serial_puts(s); +} + +int serial_getc(void) +{ + return au1x00_serial_getc(); +} + +int serial_tstc(void) +{ + return au1x00_serial_tstc(); +} +#endif |