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| author | Purna Chandra Mandal <purna.mandal@microchip.com> | 2016-01-28 10:00:15 (GMT) |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-02-01 21:14:01 (GMT) |
| commit | 9ffa7a35ef940b27813c11f68eb28a6b82696915 (patch) | |
| tree | 03fc3202d548ccedf138e33f61efb478db7eaf80 /arch/mips/mach-pic32/reset.c | |
| parent | 9e160ee823b44e0a63bc469d42d7d9fcab54b60b (diff) | |
| download | u-boot-9ffa7a35ef940b27813c11f68eb28a6b82696915.tar.xz | |
drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).
Signed-off-by: Paul Thacker <paul.thacker@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips/mach-pic32/reset.c')
0 files changed, 0 insertions, 0 deletions