diff options
| author | York Sun <yorksun@freescale.com> | 2011-08-26 18:32:44 (GMT) |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-30 00:01:06 (GMT) |
| commit | d29d17d7badcf90a31e5d6d1d9a82838ea039a42 (patch) | |
| tree | 9713d45bee6808ec043a23522f5af0329c82005d /arch/powerpc/cpu/mpc83xx/ecc.c | |
| parent | 4e57382faa4bcad285baee21737de2c99ba6baad (diff) | |
| download | u-boot-d29d17d7badcf90a31e5d6d1d9a82838ea039a42.tar.xz | |
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
Unified DDR driver is maintained for better performance, robustness and bug
fixes. Upgrading to use unified DDR driver for MPC83xx takes advantage of
overall improvement. It requires changes for board files to customize
platform-dependent parameters.
To utilize the unified DDR driver, a board needs to define CONFIG_FSL_DDRx
in the header file. No more boards will be accepted without such definition.
Note: the workaround for erratum DDR6 for the very old MPC834x Rev 1.0/1.1
and MPC8360 Rev 1.1/1.2 parts is not migrated to unified driver.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx/ecc.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/ecc.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c index f8eab96..717365c 100644 --- a/arch/powerpc/cpu/mpc83xx/ecc.c +++ b/arch/powerpc/cpu/mpc83xx/ecc.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Freescale Semiconductor, Inc. + * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. * * Dave Liu <daveliu@freescale.com> * based on the contribution of Marian Balakowicz <m8@semihalf.com> @@ -20,8 +20,12 @@ #if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) void ecc_print_status(void) { - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; + immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; +#ifdef CONFIG_FSL_DDR2 + ccsr_ddr_t *ddr = &immap->ddr; +#else + ddr83xx_t *ddr = &immap->ddr; +#endif printf("\nECC mode: %s\n\n", (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); @@ -100,8 +104,12 @@ void ecc_print_status(void) int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; + immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; +#ifdef CONFIG_FSL_DDR2 + ccsr_ddr_t *ddr = &immap->ddr; +#else + ddr83xx_t *ddr = &immap->ddr; +#endif volatile u32 val; u64 *addr; u32 count; |