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authorYork Sun <yorksun@freescale.com>2012-10-08 07:44:15 (GMT)
committerAndy Fleming <afleming@freescale.com>2012-10-22 19:31:19 (GMT)
commitd1001e3f0ce0059a55a870c42bac8aba2e4befec (patch)
treebb8dd7437496f9705ab0dbd59460ed3ce60a57f4 /arch/powerpc/cpu/mpc85xx/Makefile
parentfd3cebd020edad5fa18ff5a64cde3aa75aa896c8 (diff)
downloadu-boot-d1001e3f0ce0059a55a870c42bac8aba2e4befec.tar.xz
powerpc/corenet2: Add SerDes for corenet2
Create new files to handle 2nd generation Chassis as the registers are organized differently. - Add SerDes protocol parsing and detection - Add support of 4 SerDes - Add CPRI protocol in fsl_serdes.h The Common Public Radio Interface (CPRI) is publicly available specification that standardizes the protocol interface between the radio equipment control (REC) and the radio equipment (RE) in wireless basestations. This allows interoperability of equipment from different vendors,and preserves the software investment made by wireless service providers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/Makefile')
-rw-r--r--arch/powerpc/cpu/mpc85xx/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index aad50f3..c5982db 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -85,7 +85,8 @@ COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
COBJS-$(CONFIG_QE) += qe_io.o
COBJS-$(CONFIG_CPM2) += serial_scc.o
-COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_serdes.o
+COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
+COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
# SoC specific SERDES support
COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o