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| author | Po Liu <po.liu@freescale.com> | 2013-11-26 06:34:07 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-12-04 22:54:32 (GMT) |
| commit | 380b8f307c5291016e1249ccd263876f0e9c1278 (patch) | |
| tree | 78be365c63e24410f42edaebc30a5ec4895b9fc5 /arch/powerpc/cpu/mpc85xx/speed.c | |
| parent | c3cc02af6ce6f4ff2fa494aeb4dbf1e037254877 (diff) | |
| download | u-boot-380b8f307c5291016e1249ccd263876f0e9c1278.tar.xz | |
powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM
Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/speed.c')
0 files changed, 0 insertions, 0 deletions