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| author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2013-11-28 04:38:12 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-12-04 22:54:34 (GMT) |
| commit | 7aa6c455c357f6d767acec747bbecb23664eeacb (patch) | |
| tree | e2808835a3aabca97d6a3aff965ece9335648ae7 /arch/powerpc/cpu/mpc85xx/speed.c | |
| parent | 380b8f307c5291016e1249ccd263876f0e9c1278 (diff) | |
| download | u-boot-7aa6c455c357f6d767acec747bbecb23664eeacb.tar.xz | |
powerpc: spiflash:Add corenet devices support in eSPI SPL
Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/speed.c')
0 files changed, 0 insertions, 0 deletions