diff options
author | york <yorksun@freescale.com> | 2010-07-02 22:25:54 (GMT) |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 18:16:09 (GMT) |
commit | 7fd101c97b58dab7b0bd87f30c3dedb0db21d15f (patch) | |
tree | fe0f75ff8b46b1bc0367f6c600418a596eaee446 /arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | |
parent | 5800e7ab32c200836e81ab2384817d93105561c5 (diff) | |
download | u-boot-7fd101c97b58dab7b0bd87f30c3dedb0db21d15f.tar.xz |
powerpc/8xxx: Enabled address hashing for 85xx
For 85xx silicon which supports address hashing, it can be activated by
hwconfig.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c')
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c index 6e73b1d..ff0ddd1 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c @@ -1161,6 +1161,14 @@ static void set_ddr_sdram_rcw_2(fsl_ddr_cfg_regs_t *ddr) ); } +static void set_ddr_eor(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) +{ + if (popts->addr_hash) { + ddr->ddr_eor = 0x40000000; /* address hash enable */ + puts("Addess hashing enabled.\n"); + } +} + unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr) { @@ -1392,6 +1400,8 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, set_csn_config_2(i, ddr); } + set_ddr_eor(ddr, popts); + #if !defined(CONFIG_FSL_DDR1) set_timing_cfg_0(ddr); #endif |