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authorYork Sun <york.sun@nxp.com>2016-12-01 21:26:06 (GMT)
committerYork Sun <york.sun@nxp.com>2016-12-02 16:52:34 (GMT)
commit830fc1bfe7c0c735c479804ce66c1c6a705260ee (patch)
tree483cbed21a47ade71f061774ac05611ae5bf1003 /arch/powerpc/cpu
parent22a1b99a1dd82cb06d05de81a8bc3c52f8b0b5bb (diff)
downloadu-boot-830fc1bfe7c0c735c479804ce66c1c6a705260ee.tar.xz
powerpc: mpc85xx: Convert CONFIG_SYS_CCSRBAR_DEFAULT to Kconfig option
Move default value definitions to to Kconfig SYS_CCSRBAR_DEFAULT. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 9a5cd85..1d2e027 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -471,6 +471,56 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
+config SYS_CCSRBAR_DEFAULT
+ hex "Default CCSRBAR address"
+ default 0xff700000 if ARCH_BSC9131 || \
+ ARCH_BSC9132 || \
+ ARCH_C29X || \
+ ARCH_MPC8536 || \
+ ARCH_MPC8540 || \
+ ARCH_MPC8541 || \
+ ARCH_MPC8544 || \
+ ARCH_MPC8548 || \
+ ARCH_MPC8555 || \
+ ARCH_MPC8560 || \
+ ARCH_MPC8568 || \
+ ARCH_MPC8569 || \
+ ARCH_MPC8572 || \
+ ARCH_P1010 || \
+ ARCH_P1011 || \
+ ARCH_P1020 || \
+ ARCH_P1021 || \
+ ARCH_P1022 || \
+ ARCH_P1024 || \
+ ARCH_P1025 || \
+ ARCH_P2020
+ default 0xff600000 if ARCH_P1023
+ default 0xfe000000 if ARCH_B4420 || \
+ ARCH_B4860 || \
+ ARCH_P2041 || \
+ ARCH_P3041 || \
+ ARCH_P4080 || \
+ ARCH_P5020 || \
+ ARCH_P5040 || \
+ ARCH_T1013 || \
+ ARCH_T1014 || \
+ ARCH_T1020 || \
+ ARCH_T1022 || \
+ ARCH_T1023 || \
+ ARCH_T1024 || \
+ ARCH_T1040 || \
+ ARCH_T1042 || \
+ ARCH_T2080 || \
+ ARCH_T2081 || \
+ ARCH_T4160 || \
+ ARCH_T4240
+ default 0xe0000000 if ARCH_QEMU_E500
+ help
+ Default value of CCSRBAR comes from power-on-reset. It
+ is fixed on each SoC. Some SoCs can have different value
+ if changed by pre-boot regime. The value here must match
+ the current value in SoC. If not sure, do not change.
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"