diff options
author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2013-07-02 03:51:04 (GMT) |
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committer | York Sun <yorksun@freescale.com> | 2013-08-09 19:41:40 (GMT) |
commit | 64501c669851e45dd47699349dae6b5798c075a3 (patch) | |
tree | 9ac713a2c30d740ea29a0888d9ca357b89db1ed3 /arch/powerpc/include/asm/fsl_law.h | |
parent | 17b8614754e9adc531d3f1bc3db66bf680a09447 (diff) | |
download | u-boot-64501c669851e45dd47699349dae6b5798c075a3.tar.xz |
board/bsc9132qds: Add DSP side tlb and laws
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a
integrated device that contains two powerpc e500v2 cores and two DSP
starcores.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 and M3 memory
-Creating LAW for 1GB DDR which is connected exclusively to DSP-cores
Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_law.h')
-rw-r--r-- | arch/powerpc/include/asm/fsl_law.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index bea1636..fa51e59 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -82,7 +82,7 @@ enum law_trgt_if { #ifndef CONFIG_MPC8641 LAW_TRGT_IF_PCIE_1 = 0x02, #endif -#if defined(CONFIG_BSC9131) +#if defined(CONFIG_BSC9131) || defined(CONFIG_BSC9132) LAW_TRGT_IF_OCN_DSP = 0x03, #else #if !defined(CONFIG_MPC8572) && !defined(CONFIG_P2020) @@ -94,7 +94,11 @@ enum law_trgt_if { LAW_TRGT_IF_DSP_CCSR = 0x09, LAW_TRGT_IF_DDR_INTRLV = 0x0b, LAW_TRGT_IF_RIO = 0x0c, +#if defined(CONFIG_BSC9132) + LAW_TRGT_IF_CLASS_DSP = 0x0d, +#else LAW_TRGT_IF_RIO_2 = 0x0d, +#endif LAW_TRGT_IF_DPAA_SWP_SRAM = 0x0e, LAW_TRGT_IF_DDR = 0x0f, LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */ |