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| author | Laurentiu Tudor <Laurentiu.Tudor@freescale.com> | 2012-10-05 09:48:51 (GMT) |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 19:31:12 (GMT) |
| commit | e389a377ee3ad8d137c9af749ddf2354be0d4a7c (patch) | |
| tree | 40f4efbac90301ac99ce2fd47a6dea30477026c8 /arch/powerpc/include/asm/fsl_liodn.h | |
| parent | 0c7e65f3d6535277e3842903079ac0704cde672b (diff) | |
| download | u-boot-e389a377ee3ad8d137c9af749ddf2354be0d4a7c.tar.xz | |
powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs
The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself. Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_liodn.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_liodn.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index a9973b8..a37983e 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -94,6 +94,11 @@ extern void fdt_fixup_liodn(void *blob); SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\ CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) +#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \ + SET_LIODN_ENTRY_1(compat, liodn,\ + offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\ + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) + /* reg nodes for DMA start @ 0x300 */ #define SET_DMA_LIODN(dmaNum, liodn) \ SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\ |