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authorHeiko Schocher <hs@denx.de>2017-06-27 14:49:14 (GMT)
committerTom Rini <trini@konsulko.com>2017-07-03 21:35:28 (GMT)
commit98f705c9cefdfdba62c069821bbba10273a0a8ed (patch)
tree48a56e8496a9b6f5bcf523916ace5445489d79c7 /arch/powerpc/include/asm/mmu.h
parentd4db3b86a5e090e21db710bedbbe3e50d4c56428 (diff)
downloadu-boot-98f705c9cefdfdba62c069821bbba10273a0a8ed.tar.xz
powerpc: remove 4xx support
There was for long time no activity in the 4xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 4xx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h209
1 files changed, 0 insertions, 209 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 5aa916f..82e5f9f 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -585,213 +585,4 @@ extern int num_tlb_entries;
#define LAWAR_SIZE_32G (LAWAR_SIZE_BASE+24)
#endif
-#ifdef CONFIG_440
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-/* Some additional macros for combinations often used */
-#define SA_IG (SA_I | SA_G)
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-/* Some additional macros for combinations often used */
-#define AC_RW (AC_R | AC_W)
-#define AC_RWX (AC_R | AC_W | AC_X)
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ((EPN((epn)) | (sz) | TLB_VALID ))
-#define TLB1(rpn,erpn) (((rpn) & 0xfffffc00) | (erpn))
-#define TLB2(a) ((a) & 0x00000fbf)
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ;\
-0: mflr r0 ;\
- mtlr r1 ;\
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-/*----------------------------------------------------------------------------+
-| TLB specific defines.
-+----------------------------------------------------------------------------*/
-#define TLB_256MB_ALIGN_MASK 0xFF0000000ULL
-#define TLB_16MB_ALIGN_MASK 0xFFF000000ULL
-#define TLB_1MB_ALIGN_MASK 0xFFFF00000ULL
-#define TLB_256KB_ALIGN_MASK 0xFFFFC0000ULL
-#define TLB_64KB_ALIGN_MASK 0xFFFFF0000ULL
-#define TLB_16KB_ALIGN_MASK 0xFFFFFC000ULL
-#define TLB_4KB_ALIGN_MASK 0xFFFFFF000ULL
-#define TLB_1KB_ALIGN_MASK 0xFFFFFFC00ULL
-#define TLB_256MB_SIZE 0x10000000
-#define TLB_16MB_SIZE 0x01000000
-#define TLB_1MB_SIZE 0x00100000
-#define TLB_256KB_SIZE 0x00040000
-#define TLB_64KB_SIZE 0x00010000
-#define TLB_16KB_SIZE 0x00004000
-#define TLB_4KB_SIZE 0x00001000
-#define TLB_1KB_SIZE 0x00000400
-
-#define TLB_WORD0_EPN_MASK 0xFFFFFC00
-#define TLB_WORD0_EPN_ENCODE(n) (((unsigned long)(n))&0xFFFFFC00)
-#define TLB_WORD0_EPN_DECODE(n) (((unsigned long)(n))&0xFFFFFC00)
-#define TLB_WORD0_V_MASK 0x00000200
-#define TLB_WORD0_V_ENABLE 0x00000200
-#define TLB_WORD0_V_DISABLE 0x00000000
-#define TLB_WORD0_TS_MASK 0x00000100
-#define TLB_WORD0_TS_1 0x00000100
-#define TLB_WORD0_TS_0 0x00000000
-#define TLB_WORD0_SIZE_MASK 0x000000F0
-#define TLB_WORD0_SIZE_1KB 0x00000000
-#define TLB_WORD0_SIZE_4KB 0x00000010
-#define TLB_WORD0_SIZE_16KB 0x00000020
-#define TLB_WORD0_SIZE_64KB 0x00000030
-#define TLB_WORD0_SIZE_256KB 0x00000040
-#define TLB_WORD0_SIZE_1MB 0x00000050
-#define TLB_WORD0_SIZE_16MB 0x00000070
-#define TLB_WORD0_SIZE_256MB 0x00000090
-#define TLB_WORD0_TPAR_MASK 0x0000000F
-#define TLB_WORD0_TPAR_ENCODE(n) ((((unsigned long)(n))&0x0F)<<0)
-#define TLB_WORD0_TPAR_DECODE(n) ((((unsigned long)(n))>>0)&0x0F)
-
-#define TLB_WORD1_RPN_MASK 0xFFFFFC00
-#define TLB_WORD1_RPN_ENCODE(n) (((unsigned long)(n))&0xFFFFFC00)
-#define TLB_WORD1_RPN_DECODE(n) (((unsigned long)(n))&0xFFFFFC00)
-#define TLB_WORD1_PAR1_MASK 0x00000300
-#define TLB_WORD1_PAR1_ENCODE(n) ((((unsigned long)(n))&0x03)<<8)
-#define TLB_WORD1_PAR1_DECODE(n) ((((unsigned long)(n))>>8)&0x03)
-#define TLB_WORD1_PAR1_0 0x00000000
-#define TLB_WORD1_PAR1_1 0x00000100
-#define TLB_WORD1_PAR1_2 0x00000200
-#define TLB_WORD1_PAR1_3 0x00000300
-#define TLB_WORD1_ERPN_MASK 0x0000000F
-#define TLB_WORD1_ERPN_ENCODE(n) ((((unsigned long)(n))&0x0F)<<0)
-#define TLB_WORD1_ERPN_DECODE(n) ((((unsigned long)(n))>>0)&0x0F)
-
-#define TLB_WORD2_PAR2_MASK 0xC0000000
-#define TLB_WORD2_PAR2_ENCODE(n) ((((unsigned long)(n))&0x03)<<30)
-#define TLB_WORD2_PAR2_DECODE(n) ((((unsigned long)(n))>>30)&0x03)
-#define TLB_WORD2_PAR2_0 0x00000000
-#define TLB_WORD2_PAR2_1 0x40000000
-#define TLB_WORD2_PAR2_2 0x80000000
-#define TLB_WORD2_PAR2_3 0xC0000000
-#define TLB_WORD2_U0_MASK 0x00008000
-#define TLB_WORD2_U0_ENABLE 0x00008000
-#define TLB_WORD2_U0_DISABLE 0x00000000
-#define TLB_WORD2_U1_MASK 0x00004000
-#define TLB_WORD2_U1_ENABLE 0x00004000
-#define TLB_WORD2_U1_DISABLE 0x00000000
-#define TLB_WORD2_U2_MASK 0x00002000
-#define TLB_WORD2_U2_ENABLE 0x00002000
-#define TLB_WORD2_U2_DISABLE 0x00000000
-#define TLB_WORD2_U3_MASK 0x00001000
-#define TLB_WORD2_U3_ENABLE 0x00001000
-#define TLB_WORD2_U3_DISABLE 0x00000000
-#define TLB_WORD2_W_MASK 0x00000800
-#define TLB_WORD2_W_ENABLE 0x00000800
-#define TLB_WORD2_W_DISABLE 0x00000000
-#define TLB_WORD2_I_MASK 0x00000400
-#define TLB_WORD2_I_ENABLE 0x00000400
-#define TLB_WORD2_I_DISABLE 0x00000000
-#define TLB_WORD2_M_MASK 0x00000200
-#define TLB_WORD2_M_ENABLE 0x00000200
-#define TLB_WORD2_M_DISABLE 0x00000000
-#define TLB_WORD2_G_MASK 0x00000100
-#define TLB_WORD2_G_ENABLE 0x00000100
-#define TLB_WORD2_G_DISABLE 0x00000000
-#define TLB_WORD2_E_MASK 0x00000080
-#define TLB_WORD2_E_ENABLE 0x00000080
-#define TLB_WORD2_E_DISABLE 0x00000000
-#define TLB_WORD2_UX_MASK 0x00000020
-#define TLB_WORD2_UX_ENABLE 0x00000020
-#define TLB_WORD2_UX_DISABLE 0x00000000
-#define TLB_WORD2_UW_MASK 0x00000010
-#define TLB_WORD2_UW_ENABLE 0x00000010
-#define TLB_WORD2_UW_DISABLE 0x00000000
-#define TLB_WORD2_UR_MASK 0x00000008
-#define TLB_WORD2_UR_ENABLE 0x00000008
-#define TLB_WORD2_UR_DISABLE 0x00000000
-#define TLB_WORD2_SX_MASK 0x00000004
-#define TLB_WORD2_SX_ENABLE 0x00000004
-#define TLB_WORD2_SX_DISABLE 0x00000000
-#define TLB_WORD2_SW_MASK 0x00000002
-#define TLB_WORD2_SW_ENABLE 0x00000002
-#define TLB_WORD2_SW_DISABLE 0x00000000
-#define TLB_WORD2_SR_MASK 0x00000001
-#define TLB_WORD2_SR_ENABLE 0x00000001
-#define TLB_WORD2_SR_DISABLE 0x00000000
-
-/*----------------------------------------------------------------------------+
-| Following instructions are not available in Book E mode of the GNU assembler.
-+----------------------------------------------------------------------------*/
-#define DCCCI(ra,rb) .long 0x7c000000|\
- (ra<<16)|(rb<<11)|(454<<1)
-
-#define ICCCI(ra,rb) .long 0x7c000000|\
- (ra<<16)|(rb<<11)|(966<<1)
-
-#define DCREAD(rt,ra,rb) .long 0x7c000000|\
- (rt<<21)|(ra<<16)|(rb<<11)|(486<<1)
-
-#define ICREAD(ra,rb) .long 0x7c000000|\
- (ra<<16)|(rb<<11)|(998<<1)
-
-#define TLBSX(rt,ra,rb) .long 0x7c000000|\
- (rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
-
-#define TLBWE(rs,ra,ws) .long 0x7c000000|\
- (rs<<21)|(ra<<16)|(ws<<11)|(978<<1)
-
-#define TLBRE(rt,ra,ws) .long 0x7c000000|\
- (rt<<21)|(ra<<16)|(ws<<11)|(946<<1)
-
-#define TLBSXDOT(rt,ra,rb) .long 0x7c000001|\
- (rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
-
-#define MSYNC .long 0x7c000000|\
- (598<<1)
-
-#define MBAR_INST .long 0x7c000000|\
- (854<<1)
-
-#ifndef __ASSEMBLY__
-/* Prototypes */
-void mttlb1(unsigned long index, unsigned long value);
-void mttlb2(unsigned long index, unsigned long value);
-void mttlb3(unsigned long index, unsigned long value);
-unsigned long mftlb1(unsigned long index);
-unsigned long mftlb2(unsigned long index);
-unsigned long mftlb3(unsigned long index);
-
-void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value);
-void remove_tlb(u32 vaddr, u32 size);
-void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value);
-#endif /* __ASSEMBLY__ */
-
-#endif /* CONFIG_440 */
#endif /* _PPC_MMU_H_ */