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author | Stefano Babic <sbabic@denx.de> | 2012-05-09 10:07:31 (GMT) |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 06:31:35 (GMT) |
commit | c4559daa9158367878ddb3e115d60d41e0322b1f (patch) | |
tree | 87a530b33bbd11e5045396dea739d066f29248b4 /arch/powerpc | |
parent | 8f975865be2bb2d5eb2bdb9fc5ab09aae67ad8e1 (diff) | |
download | u-boot-c4559daa9158367878ddb3e115d60d41e0322b1f.tar.xz |
MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:
"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"
The values are currently negated in code - fixed.
Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'arch/powerpc')
0 files changed, 0 insertions, 0 deletions