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author | Phil Edworthy <PHIL.EDWORTHY@renesas.com> | 2011-06-01 06:35:13 (GMT) |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2011-08-22 04:16:08 (GMT) |
commit | 7fbeb6422d9fb32063c8357fcdee99f0088a1a7f (patch) | |
tree | 38ec79a5bd9f7c4784bc6e518b848bc95e894785 /arch/sh/cpu/sh2 | |
parent | fa82f871c8dbc9a15e8dc274b3f99dd5fa0da458 (diff) | |
download | u-boot-7fbeb6422d9fb32063c8357fcdee99f0088a1a7f.tar.xz |
sh: Add Renesas rsk7264 board
The rsk7264 (also know as rsk2+sh7264) is an SH2A based board
with 64MB NAND flash and 64MB SDRAM. It is very similar to the
rsk7203 board.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/sh/cpu/sh2')
-rw-r--r-- | arch/sh/cpu/sh2/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c index 6bbedd9..fff25ac 100644 --- a/arch/sh/cpu/sh2/cpu.c +++ b/arch/sh/cpu/sh2/cpu.c @@ -33,6 +33,9 @@ #define scif0_enable() do {\ writeb(readb(STBCR4) & ~0x80, STBCR4);\ } while (0) +#define scif3_enable() do {\ + writeb(readb(STBCR4) & ~0x10, STBCR4);\ + } while (0) int checkcpu(void) { @@ -47,7 +50,11 @@ int checkcpu(void) int cpu_init(void) { /* SCIF enable */ +#if defined(CONFIG_CONS_SCIF3) + scif3_enable(); +#else scif0_enable(); +#endif /* CMT clock enable */ cmt_clock_enable() ; return 0; |