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| author | Bin Meng <bmeng.cn@gmail.com> | 2017-08-16 05:41:58 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-09-16 06:57:44 (GMT) |
| commit | de9ac9a1b9c0899d05d582917330092d577d5ebe (patch) | |
| tree | b290700167bcb6395540951993d8f08e3dce64c9 /arch/x86/Kconfig | |
| parent | b3fd2126dc8114d648b1e769b9fa621e3537bf48 (diff) | |
| download | u-boot-de9ac9a1b9c0899d05d582917330092d577d5ebe.tar.xz | |
x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cda11d2..38a6187 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -108,6 +108,7 @@ source "board/intel/Kconfig" # platform-specific options below source "arch/x86/cpu/baytrail/Kconfig" +source "arch/x86/cpu/braswell/Kconfig" source "arch/x86/cpu/broadwell/Kconfig" source "arch/x86/cpu/coreboot/Kconfig" source "arch/x86/cpu/ivybridge/Kconfig" |