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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-22 08:21:10 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-28 16:36:24 (GMT) |
| commit | 53832bb8d62df6c369edf3fbb6c9dd4b5ed38710 (patch) | |
| tree | 042b2203ed6fcf8a234cb1199adf66bfa17e7599 /arch/x86/cpu/qemu | |
| parent | abab912813169e9f24e12b9a0a993b0c6060c808 (diff) | |
| download | u-boot-53832bb8d62df6c369edf3fbb6c9dd4b5ed38710.tar.xz | |
x86: mpspec: Move writing ISA interrupt entry after PCI
On some platforms the I/O APIC interrupt pin#0-15 may be connected
to platform pci devices' interrupt pin. In such cases the legacy ISA
IRQ is not available so we should not write ISA interrupt entry if
it is already occupied.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/qemu')
0 files changed, 0 insertions, 0 deletions