diff options
| author | Simon Glass <sjg@chromium.org> | 2016-03-12 05:07:08 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 02:27:25 (GMT) |
| commit | f7d35bc148de7ebca7f51a07fc9a45715f8e6d29 (patch) | |
| tree | 1eef120fd8914e625fe884c98bdf924c05245587 /arch/x86/cpu | |
| parent | 005174d661e0860a2af1be3025c2214142916ab4 (diff) | |
| download | u-boot-f7d35bc148de7ebca7f51a07fc9a45715f8e6d29.tar.xz | |
x86: Move common MRC Kconfig options to the common file
At present the MRC options are private to ivybridge. Other Intel CPUs also
use these settings. Move them to a common place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
| -rw-r--r-- | arch/x86/cpu/ivybridge/Kconfig | 27 |
1 files changed, 1 insertions, 26 deletions
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index 0819347..e23d01a 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -7,43 +7,18 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE bool - select CACHE_MRC_BIN + select CACHE_MRC_BIN if HAVE_MRC if NORTHBRIDGE_INTEL_IVYBRIDGE -config CACHE_MRC_BIN - bool - default n - -config CACHE_MRC_SIZE_KB - int - default 512 - config DCACHE_RAM_BASE - hex default 0xff7e0000 config DCACHE_RAM_SIZE - hex default 0x20000 -config HAVE_MRC - bool "Add a System Agent binary" - help - Select this option to add a System Agent binary to - the resulting U-Boot image. MRC stands for Memory Reference Code. - It is a binary blob which U-Boot uses to set up SDRAM. - - Note: Without this binary U-Boot will not be able to set up its - SDRAM so will not boot. - config DCACHE_RAM_MRC_VAR_SIZE - hex default 0x4000 - help - This is the amount of CAR (Cache as RAM) reserved for use by the - memory reference code. This should be set to 16KB (0x4000 hex) - so that MRC has enough space to run. config CPU_SPECIFIC_OPTIONS def_bool y |