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authorBin Meng <bmeng.cn@gmail.com>2015-11-13 08:11:22 (GMT)
committerSimon Glass <sjg@chromium.org>2015-12-01 13:26:35 (GMT)
commit80af39842e64a44258ab5eb913659e29fc319903 (patch)
tree0c7efb6395b9f05bd7b06b276021286e96737b64 /arch/x86/cpu
parent881c124ab81fddc41e4ecc7409ad3bb5bcbcf5a6 (diff)
downloadu-boot-80af39842e64a44258ab5eb913659e29fc319903.tar.xz
x86: Convert to use driver model timer
Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/baytrail/valleyview.c3
-rw-r--r--arch/x86/cpu/coreboot/timestamp.c22
-rw-r--r--arch/x86/cpu/efi/efi.c4
-rw-r--r--arch/x86/cpu/ivybridge/cpu.c1
-rw-r--r--arch/x86/cpu/qemu/qemu.c3
-rw-r--r--arch/x86/cpu/quark/quark.c3
-rw-r--r--arch/x86/cpu/queensbay/tnc.c3
7 files changed, 0 insertions, 39 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index a009c14..9b30451 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -28,9 +28,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index 0edee6b..b382795 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -27,28 +27,6 @@ static struct timestamp_table *ts_table __attribute__((section(".data")));
void timestamp_init(void)
{
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- uint64_t base_time;
-#endif
-
- ts_table = lib_sysinfo.tstamp_table;
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- /*
- * If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value
- * of base_time in coreboot's timestamp table as our timer base,
- * otherwise TSC counter value will be used.
- *
- * Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS,
- * the value of base_time in the timestamp table is still zero, so
- * we must exclude this case too (this is currently seen on booting
- * coreboot in qemu)
- */
- if (ts_table && ts_table->base_time)
- base_time = ts_table->base_time;
- else
- base_time = rdtsc();
- timer_set_base(base_time);
-#endif
timestamp_add_now(TS_U_BOOT_INITTED);
}
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
index 75ba0d4..993ab8d 100644
--- a/arch/x86/cpu/efi/efi.c
+++ b/arch/x86/cpu/efi/efi.c
@@ -10,10 +10,6 @@
int arch_cpu_init(void)
{
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
-
return 0;
}
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index 0e6512c..0387444 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -118,7 +118,6 @@ static void set_spi_speed(void)
int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
- timer_set_base(rdtsc());
return x86_cpu_init_f();
}
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 84fb082..1f93f72 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -64,9 +64,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index f737e19..c2bf497 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -233,9 +233,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 933d189..fb81919 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -52,9 +52,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)