diff options
| author | Simon Glass <sjg@chromium.org> | 2016-01-17 23:11:50 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 04:09:41 (GMT) |
| commit | c02a4242c88fa42d2a08e979551a85b45c946b8e (patch) | |
| tree | cddfb88ad752bc1e7c5cd709f931ea4bdbfc0ceb /arch/x86/dts | |
| parent | b32375d070e7f9717293bc55aebdba3130bee72a (diff) | |
| download | u-boot-c02a4242c88fa42d2a08e979551a85b45c946b8e.tar.xz | |
x86: ivybridge: Convert SDRAM init to use driver model
SDRAM init needs access to the Northbridge controller and the Intel
Management Engine device. Add the latter to the device tree and convert all
of this code to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 54f2043..329eae8 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -220,6 +220,12 @@ intel,pch-backlight = <0x04000000>; }; + me@16,0 { + reg = <0x0000b000 0 0 0 0>; + compatible = "intel,me"; + u-boot,dm-pre-reloc; + }; + pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,bd82x6x", "intel,pch9"; |