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authorBin Meng <bmeng.cn@gmail.com>2017-05-31 08:04:13 (GMT)
committerBin Meng <bmeng.cn@gmail.com>2017-06-05 00:55:22 (GMT)
commit6702488cfa90831454d83a63eb0b4a0bb82a3a1f (patch)
tree49ac3b7269c19883d9a5b44f60e6b45c66e17032 /arch/x86/dts
parent455a5a8086b17bd6fb60c86ec34299cae6ce2950 (diff)
downloadu-boot-6702488cfa90831454d83a63eb0b4a0bb82a3a1f.tar.xz
x86: baytrail: Remove "serial-debug-port-*" settings
"serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts')
-rw-r--r--arch/x86/dts/bayleybay.dts2
-rw-r--r--arch/x86/dts/baytrail_som-db5800-som-6867.dts2
-rw-r--r--arch/x86/dts/minnowmax.dts2
3 files changed, 0 insertions, 6 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 42a8131..1916991 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -263,8 +263,6 @@
fsp,igd-dvmt50-pre-alloc = <2>;
fsp,aperture-size = <2>;
fsp,gtt-size = <2>;
- fsp,serial-debug-port-address = <0x3f8>;
- fsp,serial-debug-port-type = <1>;
fsp,scc-enable-pci-mode;
fsp,os-selection = <4>;
fsp,emmc45-ddr50-enabled;
diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
index d4199a3..61af636 100644
--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
@@ -285,8 +285,6 @@
fsp,scc-enable-pci-mode;
fsp,os-selection = <4>;
fsp,enable-igd;
- fsp,serial-debug-port-address = <0x3f8>;
- fsp,serial-debug-port-type = <1>;
};
microcode {
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4d55abb..75d2761 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -287,8 +287,6 @@
fsp,igd-dvmt50-pre-alloc = <2>;
fsp,aperture-size = <2>;
fsp,gtt-size = <2>;
- fsp,serial-debug-port-address = <0x3f8>;
- fsp,serial-debug-port-type = <1>;
fsp,scc-enable-pci-mode;
fsp,os-selection = <4>;
fsp,emmc45-ddr50-enabled;