diff options
author | Simon Glass <sjg@chromium.org> | 2015-01-20 05:16:14 (GMT) |
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committer | Simon Glass <sjg@chromium.org> | 2015-01-24 13:13:45 (GMT) |
commit | 191c008a2155f99fc6476539878640b4032a457b (patch) | |
tree | 36823854ae5d3de1b03646f7d8230df51a62743e /arch/x86/include/asm/global_data.h | |
parent | a9aff2f46a7f7d29a662531dbc181773f16a606d (diff) | |
download | u-boot-191c008a2155f99fc6476539878640b4032a457b.tar.xz |
x86: Implement a cache for Memory Reference Code parameters
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/global_data.h')
-rw-r--r-- | arch/x86/include/asm/global_data.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 243ed5c..5ee06eb 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -65,6 +65,9 @@ struct arch_global_data { struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS]; int mtrr_req_count; int has_mtrr; + /* MRC training data to save for the next boot */ + char *mrc_output; + unsigned int mrc_output_len; }; #endif |