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authorBin Meng <bmeng.cn@gmail.com>2015-06-23 04:18:49 (GMT)
committerSimon Glass <sjg@chromium.org>2015-07-15 00:03:17 (GMT)
commit3d232878289bf59e83c6b152407a01f6e0fb790b (patch)
tree55413b7266202a293c1df5d571e22700b2370485 /arch/x86/include/asm/ioapic.h
parentba9091f55d68fc3d7b65a710f9d47c0be15e816d (diff)
downloadu-boot-3d232878289bf59e83c6b152407a01f6e0fb790b.tar.xz
x86: Add I/O APIC register access routines
I/O APIC registers are addressed indirectly. Add io_apic_read() and io_apic_write() routines to help register access. Two macros for I/O APIC ID and version register offset are also added. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/ioapic.h')
-rw-r--r--arch/x86/include/asm/ioapic.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/x86/include/asm/ioapic.h b/arch/x86/include/asm/ioapic.h
index f5d69db..77c443e 100644
--- a/arch/x86/include/asm/ioapic.h
+++ b/arch/x86/include/asm/ioapic.h
@@ -15,4 +15,28 @@
#define IO_APIC_INDEX (IO_APIC_ADDR + 0x00)
#define IO_APIC_DATA (IO_APIC_ADDR + 0x10)
+/* Indirect addressed register offset */
+#define IO_APIC_ID 0x00
+#define IO_APIC_VER 0x01
+
+/**
+ * io_apic_read() - Read I/O APIC register
+ *
+ * This routine reads I/O APIC indirect addressed register.
+ *
+ * @reg: address of indirect addressed register
+ * @return: register value to read
+ */
+u32 io_apic_read(u32 reg);
+
+/**
+ * io_apic_write() - Write I/O APIC register
+ *
+ * This routine writes I/O APIC indirect addressed register.
+ *
+ * @reg: address of indirect addressed register
+ * @val: register value to write
+ */
+void io_apic_write(u32 reg, u32 val);
+
#endif