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| author | Simon Glass <sjg@chromium.org> | 2014-11-25 04:18:16 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-25 13:34:14 (GMT) |
| commit | bb80be391693a868c2114d1a9505c45dce7a3607 (patch) | |
| tree | 48fa7818ae5d90e1925bdf900f36f34a252ead68 /arch/x86/include/asm/msr-index.h | |
| parent | 0c9075e9ad21caa43c524288d7def9e8b081fa11 (diff) | |
| download | u-boot-bb80be391693a868c2114d1a9505c45dce7a3607.tar.xz | |
x86: Add init for model 206AX CPU
Add the setup code for the CPU so that it can be used at full speed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 6027d59..2cbb270 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -326,6 +326,8 @@ #define MSR_AMD_PERF_STATUS 0xc0010063 #define MSR_AMD_PERF_CTL 0xc0010062 +#define MSR_PMG_CST_CONFIG_CTL 0x000000e2 +#define MSR_PMG_IO_CAPTURE_ADR 0x000000e4 #define MSR_IA32_MPERF 0x000000e7 #define MSR_IA32_APERF 0x000000e8 |