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authorBin Meng <bmeng.cn@gmail.com>2015-10-08 03:19:10 (GMT)
committerSimon Glass <sjg@chromium.org>2015-10-21 13:46:25 (GMT)
commit59ec719df62bcb397066aeee66fdbd8f042ca3c7 (patch)
treea1b03e864915b5325fa579ac4733bd1630778084 /arch/x86/lib/e820.c
parent19038e1bb629a365aaf971a65744e2f0e8866d62 (diff)
downloadu-boot-59ec719df62bcb397066aeee66fdbd8f042ca3c7.tar.xz
x86: Move install_e820_map() out of zimage.c
install_e820_map() has nothing to do with zimage related codes. Move it to a dedicated place. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib/e820.c')
-rw-r--r--arch/x86/lib/e820.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
new file mode 100644
index 0000000..5babfde
--- /dev/null
+++ b/arch/x86/lib/e820.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/e820.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Install a default e820 table with 4 entries as follows:
+ *
+ * 0x000000-0x0a0000 Useable RAM
+ * 0x0a0000-0x100000 Reserved for ISA
+ * 0x100000-gd->ram_size Useable RAM
+ * CONFIG_PCIE_ECAM_BASE PCIe ECAM
+ */
+__weak unsigned install_e820_map(unsigned max_entries,
+ struct e820entry *entries)
+{
+ entries[0].addr = 0;
+ entries[0].size = ISA_START_ADDRESS;
+ entries[0].type = E820_RAM;
+ entries[1].addr = ISA_START_ADDRESS;
+ entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
+ entries[1].type = E820_RESERVED;
+ entries[2].addr = ISA_END_ADDRESS;
+ entries[2].size = gd->ram_size - ISA_END_ADDRESS;
+ entries[2].type = E820_RAM;
+ entries[3].addr = CONFIG_PCIE_ECAM_BASE;
+ entries[3].size = CONFIG_PCIE_ECAM_SIZE;
+ entries[3].type = E820_RESERVED;
+
+ return 4;
+}