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author | Tom Rini <trini@ti.com> | 2015-01-13 18:39:25 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2015-01-13 18:39:25 (GMT) |
commit | 5f88ed5cde04612e5b4520327b82d81a3f5493a0 (patch) | |
tree | ae465a7b43e4a01fa4ec774f0199e86743c8d46a /arch/x86/lib/tsc_timer.c | |
parent | 95f5c8f2269fc144fba5a21c0e9edf5311007484 (diff) | |
parent | 657e384af630463e3c8c4ffbacd16c5e46aeb0e0 (diff) | |
download | u-boot-5f88ed5cde04612e5b4520327b82d81a3f5493a0.tar.xz |
Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/lib/tsc_timer.c')
-rw-r--r-- | arch/x86/lib/tsc_timer.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c index fb9afed..7f5ba2c 100644 --- a/arch/x86/lib/tsc_timer.c +++ b/arch/x86/lib/tsc_timer.c @@ -78,7 +78,7 @@ static int match_cpu(u8 family, u8 model) * * Returns the calibration value or 0 if MSR calibration failed. */ -static unsigned long try_msr_calibrate_tsc(void) +static unsigned long __maybe_unused try_msr_calibrate_tsc(void) { u32 lo, hi, ratio, freq_id, freq; unsigned long res; @@ -199,7 +199,7 @@ static inline int pit_expect_msb(unsigned char val, u64 *tscp, #define MAX_QUICK_PIT_MS 50 #define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) -static unsigned long quick_pit_calibrate(void) +static unsigned long __maybe_unused quick_pit_calibrate(void) { int i; u64 tsc, delta; @@ -306,6 +306,9 @@ unsigned __attribute__((no_instrument_function)) long get_tbclk_mhz(void) if (gd->arch.tsc_mhz) return gd->arch.tsc_mhz; +#ifdef CONFIG_TSC_CALIBRATION_BYPASS + fast_calibrate = CONFIG_TSC_FREQ_IN_MHZ; +#else fast_calibrate = try_msr_calibrate_tsc(); if (!fast_calibrate) { @@ -313,6 +316,7 @@ unsigned __attribute__((no_instrument_function)) long get_tbclk_mhz(void) if (!fast_calibrate) panic("TSC frequency is ZERO"); } +#endif gd->arch.tsc_mhz = fast_calibrate; return fast_calibrate; |