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authorBin Meng <bmeng.cn@gmail.com>2015-07-22 08:21:15 (GMT)
committerSimon Glass <sjg@chromium.org>2015-07-28 16:36:25 (GMT)
commit1ed6648be08e4da76a08a09317932c73db0745ff (patch)
treef49ac261eae9a6a19304bf8bddf1fd74ee7ed0d8 /arch/x86/lib
parent9830d2ebb4f1683ff7f50b3420374a1843839378 (diff)
downloadu-boot-1ed6648be08e4da76a08a09317932c73db0745ff.tar.xz
x86: Reserve PCIe ECAM address range in the E820 table
We should mark PCIe ECAM address range in the E820 table as reserved otherwise kernel will not attempt to use ECAM. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c6
-rw-r--r--arch/x86/lib/zimage.c5
2 files changed, 10 insertions, 1 deletions
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 4c0a7c8..28552fa 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -77,5 +77,11 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
num_entries++;
}
+ /* Mark PCIe ECAM address range as reserved */
+ entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE;
+ entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE;
+ entries[num_entries].type = E820_RESERVED;
+ num_entries++;
+
return num_entries;
}
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 144471c..a1ec57e 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -61,8 +61,11 @@ __weak unsigned install_e820_map(unsigned max_entries,
entries[2].addr = ISA_END_ADDRESS;
entries[2].size = gd->ram_size - ISA_END_ADDRESS;
entries[2].type = E820_RAM;
+ entries[3].addr = CONFIG_PCIE_ECAM_BASE;
+ entries[3].size = CONFIG_PCIE_ECAM_SIZE;
+ entries[3].type = E820_RESERVED;
- return 3;
+ return 4;
}
static void build_command_line(char *command_line, int auto_boot)