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authorXu Ziyuan <xzy.xu@rock-chips.com>2016-07-14 16:26:59 (GMT)
committerSimon Glass <sjg@chromium.org>2016-07-26 02:44:19 (GMT)
commit266c8fad51c20c8c8a641696ac1d8d8dea58d700 (patch)
tree7f110a34d6cb45e840f71364ab26e48f8f429ee4 /arch
parent9424f1418377bfb0c95ed36a8854e7fe53436229 (diff)
downloadu-boot-266c8fad51c20c8c8a641696ac1d8d8dea58d700.tar.xz
rockchip: rk3288: add fastboot support
Enable fastboot feature on rk3288. This path doesn't support the fastboot flash function command entirely. We will hit "cannot find partition" assertion without specified partition environment. Define gpt partition layout in specified board such as firefly-rk3288, then enjoy it! Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/rk3288.dtsi1
-rw-r--r--arch/arm/mach-rockchip/board.c72
2 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 3dab0fc..bcf051a 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -454,6 +454,7 @@
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_OTG0>;
clock-names = "otg";
+ dr_mode = "otg";
phys = <&usbphy0>;
phy-names = "usb2-phy";
status = "disabled";
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b07e073..f662b26 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -85,6 +85,78 @@ void lowlevel_init(void)
{
}
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3288_otg_data = {
+ .rx_fifo_sz = 512,
+ .np_tx_fifo_sz = 16,
+ .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int node, phy_node;
+ const char *mode;
+ bool matched = false;
+ const void *blob = gd->fdt_blob;
+ u32 grf_phy_offset;
+
+ /* find the usb_otg node */
+ node = fdt_node_offset_by_compatible(blob, -1,
+ "rockchip,rk3288-usb");
+
+ while (node > 0) {
+ mode = fdt_getprop(blob, node, "dr_mode", NULL);
+ if (mode && strcmp(mode, "otg") == 0) {
+ matched = true;
+ break;
+ }
+
+ node = fdt_node_offset_by_compatible(blob, node,
+ "rockchip,rk3288-usb");
+ }
+ if (!matched) {
+ debug("Not found usb_otg device\n");
+ return -ENODEV;
+ }
+ rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+ node = fdtdec_lookup_phandle(blob, node, "phys");
+ if (node <= 0) {
+ debug("Not found usb phy device\n");
+ return -ENODEV;
+ }
+
+ phy_node = fdt_parent_offset(blob, node);
+ if (phy_node <= 0) {
+ debug("Not found usb phy device\n");
+ return -ENODEV;
+ }
+
+ rk3288_otg_data.phy_of_node = phy_node;
+ grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
+
+ /* find the grf node */
+ node = fdt_node_offset_by_compatible(blob, -1,
+ "rockchip,rk3288-grf");
+ if (node <= 0) {
+ debug("Not found grf device\n");
+ return -ENODEV;
+ }
+ rk3288_otg_data.regs_phy = grf_phy_offset +
+ fdtdec_get_addr(blob, node, "reg");
+
+ return dwc2_udc_probe(&rk3288_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return 0;
+}
+#endif
+
static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{