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| author | Tom Rini <trini@konsulko.com> | 2017-05-13 02:33:25 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-15 14:40:03 (GMT) |
| commit | 302acbede91d7dc8b6bedad69679b9fc63963ea2 (patch) | |
| tree | b1fef22a05435850465916e7d66ff4c87a987bef /arch | |
| parent | 897f70620053e4da07f1173aea3891637b7bb6a9 (diff) | |
| download | u-boot-302acbede91d7dc8b6bedad69679b9fc63963ea2.tar.xz | |
omap: Drop CONFIG_OMAP_VC_I2C_HS_MCODE
The symbol CONFIG_OMAP_VC_I2C_HS_MCODE always uses the default value.
Restructure the comment and code such that if a need arises later to use
another value we can address this then.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-omap2/vc.c | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index a68f1d1..b7f7980 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -19,14 +19,6 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/clock.h> -/* - * Define Master code if there are multiple masters on the I2C_SR bus. - * Normally not required - */ -#ifndef CONFIG_OMAP_VC_I2C_HS_MCODE -#define CONFIG_OMAP_VC_I2C_HS_MCODE 0x0 -#endif - /* Register defines and masks for VC IP Block */ /* PRM_VC_CFG_I2C_MODE */ #define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6) @@ -84,8 +76,10 @@ static void omap_vc_init(u16 speed_khz) (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT); writel(val, (*prcm)->prm_vc_cfg_i2c_clk); - val = CONFIG_OMAP_VC_I2C_HS_MCODE << - PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; + /* + * Master code if there are multiple masters on the I2C_SR bus. + */ + val = 0x0 << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; /* No HS mode for now */ val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT; writel(val, (*prcm)->prm_vc_cfg_i2c_mode); |