diff options
| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-06-15 19:09:21 (GMT) |
|---|---|---|
| committer | Scott Wood <oss@buserror.net> | 2016-07-25 01:36:28 (GMT) |
| commit | 8df375b445c506f61722e20379ce645ce133e5de (patch) | |
| tree | 13ee1fa49ae9d2bd68ba029ccc1753e8b89b7806 /arch | |
| parent | 2dc3c483a9f7c8215b4523183dc74e8692253404 (diff) | |
| download | u-boot-8df375b445c506f61722e20379ce645ce133e5de.tar.xz | |
sunxi: Add missing macros to configure the NAND controller clk
We need some macros to manipulate the NAND controller clock.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index 0088bb9..d1c5ad0 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -269,6 +269,11 @@ struct sunxi_ccm_reg { #define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2 #define CCM_MBUS_CTRL_GATE (0x1 << 31) +#define CCM_NAND_CTRL_M(x) ((x) - 1) +#define CCM_NAND_CTRL_N(x) ((x) << 16) +#define CCM_NAND_CTRL_OSCM24 (0x0 << 24) +#define CCM_NAND_CTRL_PLL6 (0x1 << 24) +#define CCM_NAND_CTRL_PLL5 (0x2 << 24) #define CCM_NAND_CTRL_ENABLE (0x1 << 31) #define CCM_MMC_CTRL_M(x) ((x) - 1) |