diff options
author | Simon Glass <sjg@chromium.org> | 2016-01-17 23:11:22 (GMT) |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 04:08:16 (GMT) |
commit | 9fd11c7a8ce8745fcfee4b86e6b9217f738d3ff4 (patch) | |
tree | 8a1d2f35a8e830e2a73dbc60ca2715d21cbabfdc /arch | |
parent | fcd30cdfa8067525a6a2044f67f11d96b1a20b37 (diff) | |
download | u-boot-9fd11c7a8ce8745fcfee4b86e6b9217f738d3ff4.tar.xz |
x86: ivybridge: Move GPIO init to the LPC init() method
This init can happen in the driver also. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/ivybridge/lpc.c | 3 |
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c3626c4..6d3f477 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -278,10 +278,6 @@ int print_cpuinfo(void) gd->arch.pei_boot_mode = boot_mode; - /* TODO: Move this to the board or driver */ - x86_pci_write_config32(PCH_LPC_DEV, GPIO_BASE, DEFAULT_GPIOBASE | 1); - x86_pci_write_config32(PCH_LPC_DEV, GPIO_CNTL, 0x10); - /* Print processor name */ name = cpu_get_name(processor_name); printf("CPU: %s\n", name); diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c index c88733d..0d85de2 100644 --- a/arch/x86/cpu/ivybridge/lpc.c +++ b/arch/x86/cpu/ivybridge/lpc.c @@ -623,6 +623,9 @@ static int bd82x6x_lpc_early_init(struct udevice *dev) setbits_le32(RCB_REG(GCS), 1 >> 5); /* No reset */ outw(1 << 11, DEFAULT_PMBASE | 0x60 | 0x08); /* halt timer */ + dm_pci_write_config32(dev->parent, GPIO_BASE, DEFAULT_GPIOBASE | 1); + dm_pci_write_config32(dev->parent, GPIO_CNTL, 0x10); + return 0; } |