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authorTom Rini <trini@konsulko.com>2017-05-13 02:33:17 (GMT)
committerTom Rini <trini@konsulko.com>2017-05-15 14:39:57 (GMT)
commitd87f82967fc90ca23672451f55eeb2a36f2f36c7 (patch)
treea2773f14be19e9b94b3836918cda885f8428102f /arch
parent89024ddc9ea63be4f71815a6a915fb3a58268d81 (diff)
downloadu-boot-d87f82967fc90ca23672451f55eeb2a36f2f36c7.tar.xz
omap5: Migrate CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC to Kconfig
While in theory this value could be used in places outside of "omap5" (such as OMAP4), we only make use of it today in OMAP5, so place the Kconfig entry there. Given that Kconfig lets us provide a default, we drop CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC entirely. The contents of doc/README.omap-reset-time make a good help entry, so adjust them slightly and delete the file. Move the comment about range to where we use the value now, and have Kconfig enforce the upper bound. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h7
-rw-r--r--arch/arm/mach-omap2/omap5/Kconfig17
-rw-r--r--arch/arm/mach-omap2/omap5/hwinit.c13
3 files changed, 24 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 7ea7199..0c99bbd 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -370,13 +370,6 @@
#define DPLL_NO_LOCK 0
#define DPLL_LOCK 1
-/*
- * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
- * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
- * into microsec and passing the value.
- */
-#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
-
#if defined(CONFIG_DRA7XX)
#define V_OSCK 20000000 /* Clock output from T2 */
#else
diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig
index c89c438..1a66abd 100644
--- a/arch/arm/mach-omap2/omap5/Kconfig
+++ b/arch/arm/mach-omap2/omap5/Kconfig
@@ -63,6 +63,23 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
using hardware memory firewalls. This value must be smaller than the
TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
+config OMAP_PLATFORM_RESET_TIME_MAX_USEC
+ int "Something"
+ range 0 31219
+ default 31219
+ help
+ Most OMAPs' provide a way to specify the time for which the reset
+ should be held low while the voltages and Oscillator outputs
+ stabilize.
+ This time is mostly board and PMIC dependent. Hence the boards are
+ expected to specify a pre-computed time using the above option.
+ This value can be computed using a summation of the below 3
+ parameters
+ 1: Time taken by the Osciallator to stop and restart
+ 2: PMIC OTP time
+ 3: Voltage ramp time, which can be derived using the PMIC slew rate
+ and value of voltage ramp needed.
+
if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
menu "Voltage Domain OPP selections"
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index 839d79d..afe59e0 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -414,12 +414,13 @@ void setup_warmreset_time(void)
{
u32 rst_time, rst_val;
-#ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
- rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC;
-#else
- rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC;
-#endif
- rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT;
+ /*
+ * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
+ * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
+ * into microsec and passing the value.
+ */
+ rst_time = usec_to_32k(CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC)
+ << RSTTIME1_SHIFT;
if (rst_time > RSTTIME1_MASK)
rst_time = RSTTIME1_MASK;