diff options
| author | Sébastien Szymanski <sebastien.szymanski@armadeus.com> | 2017-08-02 15:05:27 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-08-16 09:45:10 (GMT) |
| commit | 0c7c6fb7641646c45630235ea906200981f4fe80 (patch) | |
| tree | 246d67e8cdddee42c970a7b4b08a76963717ab38 /arch | |
| parent | 44e670532dd9e29bc25f136db8b00c49bef42c4d (diff) | |
| download | u-boot-0c7c6fb7641646c45630235ea906200981f4fe80.tar.xz | |
imx: imx6ull: correct get_cpu_speed_grade_hz
i.MX6ULL has different speed grades than i.MX6UL.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/mx6/soc.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 7607456..c15b9cb 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -114,6 +114,12 @@ u32 get_cpu_rev(void) #define OCOTP_CFG3_SPEED_528MHZ 1 #define OCOTP_CFG3_SPEED_696MHZ 2 +/* + * For i.MX6ULL + */ +#define OCOTP_CFG3_SPEED_792MHZ 2 +#define OCOTP_CFG3_SPEED_900MHZ 3 + u32 get_cpu_speed_grade_hz(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -126,7 +132,7 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (is_mx6ul() || is_mx6ull()) { + if (is_mx6ul()) { if (val == OCOTP_CFG3_SPEED_528MHZ) return 528000000; else if (val == OCOTP_CFG3_SPEED_696MHZ) @@ -135,6 +141,17 @@ u32 get_cpu_speed_grade_hz(void) return 0; } + if (is_mx6ull()) { + if (val == OCOTP_CFG3_SPEED_528MHZ) + return 528000000; + else if (val == OCOTP_CFG3_SPEED_792MHZ) + return 792000000; + else if (val == OCOTP_CFG3_SPEED_900MHZ) + return 900000000; + else + return 0; + } + switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: |