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| author | Dai Okamura <okamura.dai@socionext.com> | 2017-08-28 12:57:15 (GMT) |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-08-30 00:07:04 (GMT) |
| commit | 4013bbb1f34cc7f468600eba115fb8cfa0ff5dee (patch) | |
| tree | 388de35e407c499fb84515e03a69e59a35bbddb9 /arch | |
| parent | e0daca7de58f7e0770a86adab724a9f6f684f339 (diff) | |
| download | u-boot-4013bbb1f34cc7f468600eba115fb8cfa0ff5dee.tar.xz | |
ARM: uniphier: fix DSPLL init code for LD20 SoC
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-uniphier/clk/pll-base-ld20.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index 697eb7a..3aa42f8 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -88,7 +88,7 @@ int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi) if (!base) return -ENOMEM; - tmp = readl(base + 8); /* SSCPLLCTRL */ + tmp = readl(base + 8); /* SSCPLLCTRL3 */ tmp &= ~SC_PLLCTRL3_REGI_MASK; tmp |= regi << SC_PLLCTRL3_REGI_SHIFT; writel(tmp, base + 8); @@ -133,9 +133,9 @@ int uniphier_ld20_dspll_init(unsigned long reg_base) if (!base) return -ENOMEM; - tmp = readl(base + 8); /* DSPLLCTRL2 */ + tmp = readl(base + 4); /* DSPLLCTRL2 */ tmp |= SC_DSPLLCTRL2_K_LD; - writel(tmp, base + 8); + writel(tmp, base + 4); iounmap(base); |