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| author | Stefano Babic <sbabic@denx.de> | 2012-02-22 00:24:33 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 06:31:30 (GMT) |
| commit | 4a9677e53f609d7f1043dde12b6c15c37baa579f (patch) | |
| tree | a02642cbf96c617bd4bebecc3a9818b881d9ae61 /arch | |
| parent | f78095e40b5d9f0c03985e296289be5a84a40f8a (diff) | |
| download | u-boot-4a9677e53f609d7f1043dde12b6c15c37baa579f.tar.xz | |
Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-mx5/imx-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 4fa6658..07296b5 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -93,6 +93,7 @@ #define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000) #define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000) #define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000) +#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000) #endif /* * AIPS 2 @@ -133,6 +134,10 @@ #define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) #define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) +#if defined(CONFIG_MX53) +#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) +#endif + /* * WEIM CSnGCR1 */ |