diff options
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-05-15 11:24:11 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-06-05 19:55:39 (GMT) |
| commit | 9752eb64260cb51b8c87dcddc73e6270a494e073 (patch) | |
| tree | 01182a7d08efe0efca793a9428b2a0ff66123761 /arch | |
| parent | 9a650bfec34c10baf673f9ab95f00dec7210e8c6 (diff) | |
| download | u-boot-9752eb64260cb51b8c87dcddc73e6270a494e073.tar.xz | |
board/t208x: update t2080qds/t2080rdb for errata A-007186
As errata A-007186, we need to use the alternate serdes
protocol instead of those impacted protocols.
- add support for serdes protocols: 0x1b, 0x50, 0x5e,
0x64, 0x6a, 0xd2, 0x67, 0x70.
- update t2080_rcw.cfg to adapt to new rcw_66_15 for
t2080qds and t2080rdb.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 07e27de..2b7c698 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -43,6 +43,10 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, PCIE4, PCIE4, PCIE4} }, + {0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, + SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, @@ -59,18 +63,34 @@ static const struct serdes_config serdes1_cfg_tbl[] = { SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x50, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, + XAUI_FM1_MAC9, XAUI_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x51, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x5E, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x5F, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x64, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x65, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x6A, {XFI_FM1_MAC9, XFI_FM1_MAC10, + XFI_FM1_MAC1, XFI_FM1_MAC2, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x6B, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, SGMII_FM1_DTSEC4, @@ -115,6 +135,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, + SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, @@ -127,8 +150,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x66, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, PCIE4, PCIE4, PCIE4} }, - -#if defined(CONFIG_PPC_T2081) {0xAA, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4} }, {0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, @@ -137,7 +158,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x70, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, -#endif {} }; |